Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42522 )
Change subject: soc/amd/common: Drop ACPIMMIO GPIO bank separation ......................................................................
Patch Set 5:
(3 comments)
https://review.coreboot.org/c/coreboot/+/42522/5/src/soc/amd/common/block/gp... File src/soc/amd/common/block/gpio_banks/gpio.c:
https://review.coreboot.org/c/coreboot/+/42522/5/src/soc/amd/common/block/gp... PS5, Line 98: __gpio_and32
There's only one user of this. […]
I have some other user in followup.
https://review.coreboot.org/c/coreboot/+/42522/5/src/soc/amd/common/block/gp... PS5, Line 105: -1UL
dirty ;)
Do you want 0xfffffffff here? Or avoid using __gpio_update32()?
https://review.coreboot.org/c/coreboot/+/42522/5/src/soc/amd/common/block/gp... PS5, Line 139: gpio_set(gpio_num, value);
I know this is the same ordering as previous code, but should we set the value prior to enabling out […]
Good question. I think pcengines/apu2 incorrectly sets up IOMUX function after setting the pin to output too. But it indeed attemps to avoid any glitches.