[coreboot-gerrit] Change in coreboot[master]: drivers/intel/gma: Add `new-pch.asl` for Skylake+

[Benjamin Doron (Code Review)]

Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31503 )

Change subject: drivers/intel/gma: Add `new-pch.asl` for Skylake+
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Patch Set 1:

(1 comment)

This change looks to require CSTE (Current Display State), NSTE (Next Display State) and DSEN (Display Output Switching Enable) added to globalnvs and the SMI trap added back to platform (https://github.com/coreboot/coreboot/commit/2e37fdddd5f859b82923485612ec8693...)

https://review.coreboot.org/c/coreboot/+/31503/1/src/drivers/intel/gma/acpi/... 
File src/drivers/intel/gma/acpi/new-pch.asl:

PS1:
> Something like that was the original idea. But people have re-invented […]

Are you referring to CB:32529 and CB:32549?