Attention is currently required from: Sean Rhodes.
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78408?usp=email )
Change subject: Revert "soc/intel/apollolake: Correct the logic for the legacy 8254 timer" ......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/apollolake/chip.c:
https://review.coreboot.org/c/coreboot/+/78408/comment/104ea0e7_24abac33 : PS1, Line 752: silconfig->Timer8254ClkSetting = use_8254; I am not fully sure with the revert... If I am not completely wrong the current logic is: If USE_LEGACY_8254_TIMER is not set, then clock gating is enabled. This is not terribly wrong so far but was implemented inverse for Apollo Lake. This is where the real mistake happened.
What if we keep your current patch in the tree and set this switch default to yes for APL only? This way around the logic will be consistent across all platforms and there is not issue with APL because the old behavior persists.
In a follow-up we could rename 'USE_LEGACY_8254_TIMER' to 'LEGACY_8254_TIMER_CLK_GATING_EN' or the like to make it clear what this switch is actually doing.
What do you think?