[coreboot-gerrit] [S] Change in coreboot[main]: soc/mediatek: Utilize REGION() and REGION_END() macros

[Yu-Ping Wu (Code Review)]

Attention is currently required from: Hung-Te Lin, Yidi Lin.

Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86116?usp=email )

Change subject: soc/mediatek: Utilize REGION() and REGION_END() macros
......................................................................

soc/mediatek: Utilize REGION() and REGION_END() macros

Change-Id: Iad5a129a558e8902fbfd4adb9c34d9d5e5cba25f
Signed-off-by: Yu-Ping Wu 
---
M src/soc/mediatek/common/mmu_operations.c
M src/soc/mediatek/mt8173/soc.c
2 files changed, 6 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/86116/1

diff --git a/src/soc/mediatek/common/mmu_operations.c b/src/soc/mediatek/common/mmu_operations.c
index be216f6..4af0567 100644
--- a/src/soc/mediatek/common/mmu_operations.c
+++ b/src/soc/mediatek/common/mmu_operations.c
@@ -26,13 +26,13 @@
    mmu_config_range((void *)0, (uintptr_t)16U * GiB, DEV_MEM);

/* SRAM is cached */
-	mmu_config_range(_sram, REGION_SIZE(sram), SECURE_CACHED_MEM);
+	mmu_config_range(REGION(sram), REGION_SIZE(sram), SECURE_CACHED_MEM);

/* L2C SRAM is cached */
-	mmu_config_range(_sram_l2c, REGION_SIZE(sram_l2c), SECURE_CACHED_MEM);
+	mmu_config_range(REGION(sram_l2c), REGION_SIZE(sram_l2c), SECURE_CACHED_MEM);

/* DMA is non-cached and is reserved for TPM & da9212 I2C DMA */
-	mmu_config_range(_dma_coherent, REGION_SIZE(dma_coherent),
+	mmu_config_range(REGION(dma_coherent), REGION_SIZE(dma_coherent),
    		 SECURE_UNCACHED_MEM);

mmu_enable();
@@ -41,7 +41,7 @@
 void mtk_mmu_after_dram(void)
 {
    /* Map DRAM as cached now that it's up and running */
-	mmu_config_range(_dram, (uintptr_t)sdram_size(), NONSECURE_CACHED_MEM);
+	mmu_config_range(REGION(dram), (uintptr_t)sdram_size(), NONSECURE_CACHED_MEM);

mtk_soc_after_dram();
 }
@@ -50,7 +50,7 @@
 {
    /* Unmap L2C SRAM so it can be reclaimed by L2 cache */
    /* TODO: Implement true unmapping, and also use it for the zero-page! */
-	mmu_config_range(_sram_l2c, REGION_SIZE(sram_l2c), DEV_MEM);
+	mmu_config_range(REGION(sram_l2c), REGION_SIZE(sram_l2c), DEV_MEM);

/* Careful: changing cache geometry while it's active is a bad idea! */
    mmu_disable();
diff --git a/src/soc/mediatek/mt8173/soc.c b/src/soc/mediatek/mt8173/soc.c
index f6ee122..85a227a 100644
--- a/src/soc/mediatek/mt8173/soc.c
+++ b/src/soc/mediatek/mt8173/soc.c
@@ -11,7 +11,7 @@
    if (size > REGION_SIZE(sram))
    	return 0;

-	if (start >= (uintptr_t)_sram && (start + size) <= (uintptr_t)_esram) {
+	if (start >= REGION(sram) && (start + size) <= REGION_END(sram)) {
    	printk(BIOS_DEBUG, "MT8173 uses SRAM for loading BL31.\n");
    	return 1;
    }