Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40946 )
Change subject: nb/intel/sandybridge/raminit: Add ECC debug code ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/40946/2/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit.c:
https://review.coreboot.org/c/coreboot/+/40946/2/src/northbridge/intel/sandy... PS2, Line 389: 16 `bit 16`
But that can only be fully true for 2-rank configurations.
https://review.coreboot.org/c/coreboot/+/40946/2/src/northbridge/intel/sandy... PS2, Line 390: * Rowbits start at bit 20 in physical memory map. Most probably depends on the configuration, 1/2/4 ranks 1/2 channels.