[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: LZ4 Compress FSP-M

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48158 )

Change subject: soc/intel/apollolake: LZ4 Compress FSP-M
......................................................................

soc/intel/apollolake: LZ4 Compress FSP-M

FSP-M is not run XIP so it can be compressed. This more than halves
the binary size. 364544 bytes -> 168616 bytes.

On the up/squared this also results in a 83ms speedup.

TESTED: up/squared boots.

Change-Id: Ic76b51f0f3007b59ccb9f76b6a57bb9265dab833
Signed-off-by: Arthur Heymans 
---
M src/soc/intel/apollolake/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/48158/1

diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 4f762a9..bf7cd0b 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -46,6 +46,7 @@
    select MRC_SETTINGS_PROTECT
    select MRC_SETTINGS_VARIABLE_DATA
    select NO_XIP_EARLY_STAGES
+	select FSP_COMPRESS_FSP_M_LZ4
    select PARALLEL_MP
    select PARALLEL_MP_AP_WORK
    select PCIEXP_ASPM