Arthur Heymans has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69501 )
(
4 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: util/autoport: Update devicetree generation ......................................................................
util/autoport: Update devicetree generation
CPU nodes are now declared in a common chipset.cb.
TESTED: generates a proper devicetree for x220 based on logs.
Change-Id: Ic1f2d3d611aa3979b846706b6f743f79a3c4e54d Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/69501 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M util/autoport/sandybridge.go 1 file changed, 17 insertions(+), 28 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/util/autoport/sandybridge.go b/util/autoport/sandybridge.go index 950286c..a60018e 100644 --- a/util/autoport/sandybridge.go +++ b/util/autoport/sandybridge.go @@ -36,34 +36,6 @@ }, Children: []DevTreeNode{ { - Chip: "cpu_cluster", - Dev: 0, - Children: []DevTreeNode{ - { - Chip: "cpu/intel/model_206ax", - Comment: "FIXME: check all registers", - Registers: map[string]string{ - /* FIXME:XX hardcoded. */ - "acpi_c1": "1", - "acpi_c2": "3", - "acpi_c3": "5", - }, - Children: []DevTreeNode{ - { - Chip: "lapic", - Dev: 0, - }, - { - Chip: "lapic", - Dev: 0xacac, - Disabled: true, - }, - }, - }, - }, - }, - - { Chip: "domain", Dev: 0, PCIController: true,