Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32334 )
Change subject: Documentation: Explain DDR3 read training ......................................................................
Patch Set 2:
(6 comments)
https://review.coreboot.org/c/coreboot/+/32334/1/Documentation/getting_start... File Documentation/getting_started/ram_initialization/readtraining.md:
https://review.coreboot.org/c/coreboot/+/32334/1/Documentation/getting_start... PS1, Line 7: MCH
MCH is intel-specific, use "memory controller" instead.
Done
https://review.coreboot.org/c/coreboot/+/32334/1/Documentation/getting_start... PS1, Line 13: MCH
Same
Done
https://review.coreboot.org/c/coreboot/+/32334/1/Documentation/getting_start... PS1, Line 27: usually
usually?
under normal conditions; generally.
https://review.coreboot.org/c/coreboot/+/32334/1/Documentation/getting_start... PS1, Line 98:
trailing space
Done
https://review.coreboot.org/c/coreboot/+/32334/1/Documentation/getting_start... PS1, Line 103: phase in
From here onwards, lines are a bit too long
Done
https://review.coreboot.org/c/coreboot/+/32334/1/Documentation/getting_start... PS1, Line 107: Samples
Sample
Done