[coreboot-gerrit] Change in ...coreboot[master]: cpu/intel/gen1/smmrelocate: Check for sanity on SMRR

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30709 )

Change subject: cpu/intel/gen1/smmrelocate: Check for sanity on SMRR
......................................................................

cpu/intel/gen1/smmrelocate: Check for sanity on SMRR

This happens when TSEG is found to be unaligned.

Change-Id: Id0c078a880dddb55857af2bca233cf4dee91250a
Signed-off-by: Arthur Heymans 
Reviewed-on: https://review.coreboot.org/c/30709
Reviewed-by: Patrick Georgi 
Tested-by: build bot (Jenkins) 
---
M src/cpu/intel/smm/gen1/smmrelocate.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Patrick Georgi: Looks good to me, approved

diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c
index 426eae5..5667648 100644
--- a/src/cpu/intel/smm/gen1/smmrelocate.c
+++ b/src/cpu/intel/smm/gen1/smmrelocate.c
@@ -132,7 +132,7 @@

/* Write SMRR MSRs based on indicated support. */
    mtrr_cap = rdmsr(MTRR_CAP_MSR);
-	if (mtrr_cap.lo & SMRR_SUPPORTED)
+	if (mtrr_cap.lo & SMRR_SUPPORTED && relo_params->smrr_mask.lo != 0)
    	write_smrr(relo_params);

southbridge_clear_smi_status();