Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35555 )
Change subject: soc/mediatek/mt8183: Run calibration with multiple frequencies for DVFS switch
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Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35555/7/src/soc/mediatek/mt8183/emi...
File src/soc/mediatek/mt8183/emi.c:
https://review.coreboot.org/c/coreboot/+/35555/7/src/soc/mediatek/mt8183/emi...
PS7, Line 345: emi_init2(params);
I think below setting maybe ok, i will confirm this changes with DRAM design and reply later. […]
@huayang Let's merge this CL first and refactor later when we have an agreement.
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Gerrit-Change-Id: I97c8e513dc3815a2d62b2904a246a1d8567704a4
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