Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31270
Change subject: intel/spi: Define PCI accessor aliases only once ......................................................................
intel/spi: Define PCI accessor aliases only once
These files copied code from flashrom project that uses different names for PCI config accessors.
Also fix cases of using ENV_SMM where __SIMPLE_DEVICE__ should be used, if the file is to be build for bootblock or romstage later.
Change-Id: If7190ac105b2a65a9576709955c3cc840b95dcdf Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- A src/include/device/pci_compat.h M src/soc/intel/baytrail/spi.c M src/soc/intel/braswell/spi.c M src/soc/intel/broadwell/spi.c M src/soc/intel/fsp_baytrail/spi.c M src/southbridge/intel/common/spi.c M src/southbridge/intel/fsp_rangeley/spi.c 7 files changed, 70 insertions(+), 180 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/31270/1
diff --git a/src/include/device/pci_compat.h b/src/include/device/pci_compat.h new file mode 100644 index 0000000..d80fe01 --- /dev/null +++ b/src/include/device/pci_compat.h @@ -0,0 +1,35 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but without any warranty; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __PCI_COMPAT_H__ +#define __PCI_COMPAT_H__ + +#include <device/pci_ops.h> + +#if defined(__PCI_COMPAT_FLASHROM__) + +#define pci_read_config_byte(dev, reg, targ)\ + *(targ) = pci_read_config8(dev, reg) +#define pci_read_config_word(dev, reg, targ)\ + *(targ) = pci_read_config16(dev, reg) +#define pci_read_config_dword(dev, reg, targ)\ + *(targ) = pci_read_config32(dev, reg) +#define pci_write_config_byte(dev, reg, val)\ + pci_write_config8(dev, reg, val) +#define pci_write_config_word(dev, reg, val)\ + pci_write_config16(dev, reg, val) +#define pci_write_config_dword(dev, reg, val)\ + pci_write_config32(dev, reg, val) + +#endif /* __PCI_COMPAT_FLASHROM__ */ + +#endif /* __PCI_COMPAT_H__ */ diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c index 81e118c..4a11f33 100644 --- a/src/soc/intel/baytrail/spi.c +++ b/src/soc/intel/baytrail/spi.c @@ -21,41 +21,17 @@ #include <arch/io.h> #include <commonlib/helpers.h> #include <console/console.h> +#include <device/device.h> +#include <device/pci.h> #include <spi_flash.h> #include <spi-generic.h>
#include <soc/lpc.h> #include <soc/pci_devs.h>
-#ifdef __SMM__ -#define pci_read_config_byte(dev, reg, targ)\ - *(targ) = pci_read_config8(dev, reg) -#define pci_read_config_word(dev, reg, targ)\ - *(targ) = pci_read_config16(dev, reg) -#define pci_read_config_dword(dev, reg, targ)\ - *(targ) = pci_read_config32(dev, reg) -#define pci_write_config_byte(dev, reg, val)\ - pci_write_config8(dev, reg, val) -#define pci_write_config_word(dev, reg, val)\ - pci_write_config16(dev, reg, val) -#define pci_write_config_dword(dev, reg, val)\ - pci_write_config32(dev, reg, val) -#else /* !__SMM__ */ -#include <device/device.h> -#include <device/pci.h> -#define pci_read_config_byte(dev, reg, targ)\ - *(targ) = pci_read_config8(dev, reg) -#define pci_read_config_word(dev, reg, targ)\ - *(targ) = pci_read_config16(dev, reg) -#define pci_read_config_dword(dev, reg, targ)\ - *(targ) = pci_read_config32(dev, reg) -#define pci_write_config_byte(dev, reg, val)\ - pci_write_config8(dev, reg, val) -#define pci_write_config_word(dev, reg, val)\ - pci_write_config16(dev, reg, val) -#define pci_write_config_dword(dev, reg, val)\ - pci_write_config32(dev, reg, val) -#endif /* !__SMM__ */ +/* This file uses PCI accessor in style of flashrom project. */ +#define __PCI_COMPAT_FLASHROM__ +#include <device/pci_compat.h>
typedef struct spi_slave ich_spi_slave;
@@ -264,7 +240,7 @@ { uint32_t sbase;
-#ifdef __SMM__ +#ifdef __SIMPLE_DEVICE__ pci_devfn_t dev = PCI_DEV(0, LPC_DEV, LPC_FUNC); #else struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC); diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c index febf1d2..8ed8d17 100644 --- a/src/soc/intel/braswell/spi.c +++ b/src/soc/intel/braswell/spi.c @@ -19,6 +19,8 @@ #include <commonlib/helpers.h> #include <console/console.h> #include <delay.h> +#include <device/device.h> +#include <device/pci.h> #include <soc/lpc.h> #include <soc/pci_devs.h> #include <spi_flash.h> @@ -27,35 +29,9 @@ #include <stdlib.h> #include <string.h>
-#if ENV_SMM -#define pci_read_config_byte(dev, reg, targ)\ - *(targ) = pci_read_config8(dev, reg) -#define pci_read_config_word(dev, reg, targ)\ - *(targ) = pci_read_config16(dev, reg) -#define pci_read_config_dword(dev, reg, targ)\ - *(targ) = pci_read_config32(dev, reg) -#define pci_write_config_byte(dev, reg, val)\ - pci_write_config8(dev, reg, val) -#define pci_write_config_word(dev, reg, val)\ - pci_write_config16(dev, reg, val) -#define pci_write_config_dword(dev, reg, val)\ - pci_write_config32(dev, reg, val) -#else /* ENV_SMM */ -#include <device/device.h> -#include <device/pci.h> -#define pci_read_config_byte(dev, reg, targ)\ - *(targ) = pci_read_config8(dev, reg) -#define pci_read_config_word(dev, reg, targ)\ - *(targ) = pci_read_config16(dev, reg) -#define pci_read_config_dword(dev, reg, targ)\ - *(targ) = pci_read_config32(dev, reg) -#define pci_write_config_byte(dev, reg, val)\ - pci_write_config8(dev, reg, val) -#define pci_write_config_word(dev, reg, val)\ - pci_write_config16(dev, reg, val) -#define pci_write_config_dword(dev, reg, val)\ - pci_write_config32(dev, reg, val) -#endif /* ENV_SMM */ +/* This file uses PCI accessor in style of flashrom project. */ +#define __PCI_COMPAT_FLASHROM__ +#include <device/pci_compat.h>
typedef struct spi_slave ich_spi_slave;
@@ -232,7 +208,7 @@ { uint32_t sbase;
-#if ENV_SMM +#ifdef __SIMPLE_DEVICE__ pci_devfn_t dev = PCI_DEV(0, LPC_DEV, LPC_FUNC); #else struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC); diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c index de3d061..6b9e962 100644 --- a/src/soc/intel/broadwell/spi.c +++ b/src/soc/intel/broadwell/spi.c @@ -20,41 +20,17 @@ #include <delay.h> #include <arch/io.h> #include <console/console.h> +#include <device/device.h> +#include <device/pci.h> #include <spi_flash.h> #include <spi-generic.h> #include <soc/pci_devs.h> #include <soc/rcba.h> #include <soc/spi.h>
-#ifdef __SMM__ -#define pci_read_config_byte(dev, reg, targ)\ - *(targ) = pci_read_config8(dev, reg) -#define pci_read_config_word(dev, reg, targ)\ - *(targ) = pci_read_config16(dev, reg) -#define pci_read_config_dword(dev, reg, targ)\ - *(targ) = pci_read_config32(dev, reg) -#define pci_write_config_byte(dev, reg, val)\ - pci_write_config8(dev, reg, val) -#define pci_write_config_word(dev, reg, val)\ - pci_write_config16(dev, reg, val) -#define pci_write_config_dword(dev, reg, val)\ - pci_write_config32(dev, reg, val) -#else /* !__SMM__ */ -#include <device/device.h> -#include <device/pci.h> -#define pci_read_config_byte(dev, reg, targ)\ - *(targ) = pci_read_config8(dev, reg) -#define pci_read_config_word(dev, reg, targ)\ - *(targ) = pci_read_config16(dev, reg) -#define pci_read_config_dword(dev, reg, targ)\ - *(targ) = pci_read_config32(dev, reg) -#define pci_write_config_byte(dev, reg, val)\ - pci_write_config8(dev, reg, val) -#define pci_write_config_word(dev, reg, val)\ - pci_write_config16(dev, reg, val) -#define pci_write_config_dword(dev, reg, val)\ - pci_write_config32(dev, reg, val) -#endif /* !__SMM__ */ +/* This file uses PCI accessor in style of flashrom project. */ +#define __PCI_COMPAT_FLASHROM__ +#include <device/pci_compat.h>
typedef struct spi_slave ich_spi_slave;
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c index 41d5150..6ecae37 100644 --- a/src/soc/intel/fsp_baytrail/spi.c +++ b/src/soc/intel/fsp_baytrail/spi.c @@ -22,41 +22,17 @@ #include <delay.h> #include <arch/io.h> #include <console/console.h> +#include <device/device.h> +#include <device/pci.h> #include <spi_flash.h> #include <spi-generic.h>
#include <soc/lpc.h> #include <soc/pci_devs.h>
-#ifdef __SMM__ -#define pci_read_config_byte(dev, reg, targ)\ - *(targ) = pci_read_config8(dev, reg) -#define pci_read_config_word(dev, reg, targ)\ - *(targ) = pci_read_config16(dev, reg) -#define pci_read_config_dword(dev, reg, targ)\ - *(targ) = pci_read_config32(dev, reg) -#define pci_write_config_byte(dev, reg, val)\ - pci_write_config8(dev, reg, val) -#define pci_write_config_word(dev, reg, val)\ - pci_write_config16(dev, reg, val) -#define pci_write_config_dword(dev, reg, val)\ - pci_write_config32(dev, reg, val) -#else /* !__SMM__ */ -#include <device/device.h> -#include <device/pci.h> -#define pci_read_config_byte(dev, reg, targ)\ - *(targ) = pci_read_config8(dev, reg) -#define pci_read_config_word(dev, reg, targ)\ - *(targ) = pci_read_config16(dev, reg) -#define pci_read_config_dword(dev, reg, targ)\ - *(targ) = pci_read_config32(dev, reg) -#define pci_write_config_byte(dev, reg, val)\ - pci_write_config8(dev, reg, val) -#define pci_write_config_word(dev, reg, val)\ - pci_write_config16(dev, reg, val) -#define pci_write_config_dword(dev, reg, val)\ - pci_write_config32(dev, reg, val) -#endif /* !__SMM__ */ +/* This file uses PCI accessor in style of flashrom project. */ +#define __PCI_COMPAT_FLASHROM__ +#include <device/pci_compat.h>
typedef struct spi_slave ich_spi_slave;
@@ -253,7 +229,7 @@ { uint32_t sbase;
-#ifdef __SMM__ +#ifdef __SIMPLE_DEVICE__ pci_devfn_t dev = PCI_DEV(0, LPC_DEV, LPC_FUNC); #else struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC); diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 4c59399..13e1a44 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -25,46 +25,21 @@ #include <delay.h> #include <arch/io.h> #include <console/console.h> +#include <device/device.h> #include <device/pci.h> #include <spi_flash.h>
#include <spi-generic.h>
+/* This file uses PCI accessor in style of flashrom project. */ +#define __PCI_COMPAT_FLASHROM__ +#include <device/pci_compat.h> + #define HSFC_FCYCLE_OFF 1 /* 1-2: FLASH Cycle */ #define HSFC_FCYCLE (0x3 << HSFC_FCYCLE_OFF) #define HSFC_FDBC_OFF 8 /* 8-13: Flash Data Byte Count */ #define HSFC_FDBC (0x3f << HSFC_FDBC_OFF)
- -#ifdef __SMM__ -#define pci_read_config_byte(dev, reg, targ)\ - *(targ) = pci_read_config8(dev, reg) -#define pci_read_config_word(dev, reg, targ)\ - *(targ) = pci_read_config16(dev, reg) -#define pci_read_config_dword(dev, reg, targ)\ - *(targ) = pci_read_config32(dev, reg) -#define pci_write_config_byte(dev, reg, val)\ - pci_write_config8(dev, reg, val) -#define pci_write_config_word(dev, reg, val)\ - pci_write_config16(dev, reg, val) -#define pci_write_config_dword(dev, reg, val)\ - pci_write_config32(dev, reg, val) -#else /* !__SMM__ */ -#include <device/device.h> -#define pci_read_config_byte(dev, reg, targ)\ - *(targ) = pci_read_config8(dev, reg) -#define pci_read_config_word(dev, reg, targ)\ - *(targ) = pci_read_config16(dev, reg) -#define pci_read_config_dword(dev, reg, targ)\ - *(targ) = pci_read_config32(dev, reg) -#define pci_write_config_byte(dev, reg, val)\ - pci_write_config8(dev, reg, val) -#define pci_write_config_word(dev, reg, val)\ - pci_write_config16(dev, reg, val) -#define pci_write_config_dword(dev, reg, val)\ - pci_write_config32(dev, reg, val) -#endif /* !__SMM__ */ - static int spi_is_multichip(void);
typedef struct spi_slave ich_spi_slave; diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c index 1571925..462eed6 100644 --- a/src/southbridge/intel/fsp_rangeley/spi.c +++ b/src/southbridge/intel/fsp_rangeley/spi.c @@ -21,42 +21,18 @@ #include <delay.h> #include <arch/io.h> #include <console/console.h> +#include <device/device.h> +#include <device/pci.h> #include <device/pci_ids.h>
#include <spi_flash.h> #include <spi-generic.h>
-static int ich_status_poll(u16 bitmask, int wait_til_set); +/* This file uses PCI accessor in style of flashrom project. */ +#define __PCI_COMPAT_FLASHROM__ +#include <device/pci_compat.h>
-#ifdef __SMM__ -#define pci_read_config_byte(dev, reg, targ)\ - *(targ) = pci_read_config8(dev, reg) -#define pci_read_config_word(dev, reg, targ)\ - *(targ) = pci_read_config16(dev, reg) -#define pci_read_config_dword(dev, reg, targ)\ - *(targ) = pci_read_config32(dev, reg) -#define pci_write_config_byte(dev, reg, val)\ - pci_write_config8(dev, reg, val) -#define pci_write_config_word(dev, reg, val)\ - pci_write_config16(dev, reg, val) -#define pci_write_config_dword(dev, reg, val)\ - pci_write_config32(dev, reg, val) -#else /* !__SMM__ */ -#include <device/device.h> -#include <device/pci.h> -#define pci_read_config_byte(dev, reg, targ)\ - *(targ) = pci_read_config8(dev, reg) -#define pci_read_config_word(dev, reg, targ)\ - *(targ) = pci_read_config16(dev, reg) -#define pci_read_config_dword(dev, reg, targ)\ - *(targ) = pci_read_config32(dev, reg) -#define pci_write_config_byte(dev, reg, val)\ - pci_write_config8(dev, reg, val) -#define pci_write_config_word(dev, reg, val)\ - pci_write_config16(dev, reg, val) -#define pci_write_config_dword(dev, reg, val)\ - pci_write_config32(dev, reg, val) -#endif /* !__SMM__ */ +static int ich_status_poll(u16 bitmask, int wait_til_set);
typedef struct spi_slave ich_spi_slave;
@@ -344,7 +320,7 @@ uint32_t ids; uint16_t vendor_id, device_id;
-#ifdef __SMM__ +#ifdef __SIMPLE_DEVICE__ pci_devfn_t dev = PCI_DEV(0, 31, 0); #else struct device *dev = pcidev_on_root(31, 0);