[coreboot-gerrit] Change in coreboot[master]: [WIP] cpu/x86/lapic: Enable X2APIC mode

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55262 )

Change subject: [WIP] cpu/x86/lapic: Enable X2APIC mode
......................................................................

[WIP] cpu/x86/lapic: Enable X2APIC mode

Change-Id: I19a990ba287d21ccddaa64601923f1c4830e95e9
Signed-off-by: Kyösti Mälkki 
---
M src/cpu/x86/lapic/lapic.c
1 file changed, 37 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/55262/1

diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c
index 9d1684b..a511b62 100644
--- a/src/cpu/x86/lapic/lapic.c
+++ b/src/cpu/x86/lapic/lapic.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

+#include <assert.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/lapic_def.h>
@@ -7,16 +8,46 @@
 #include <console/console.h>
 #include <stdint.h>

+static bool cpu_has_x2apic_support(void)
+{
+	/* FIXME: Check feature bits? */
+	return false;
+}
+
 void enable_lapic(void)
 {
+	uintptr_t apic_base;
+	bool use_x2apic;
    msr_t msr;

msr = rdmsr(LAPIC_BASE_MSR);
-	msr.hi &= 0xffffff00;
-	msr.lo &= ~LAPIC_BASE_MSR_ADDR_MASK;
-	msr.lo |= LAPIC_DEFAULT_BASE;
-	msr.lo |= LAPIC_BASE_MSR_ENABLE;
-	wrmsr(LAPIC_BASE_MSR, msr);
+	if (!(msr.lo & LAPIC_BASE_MSR_ENABLE)) {
+		msr.hi &= 0xffffff00;
+		msr.lo &= ~LAPIC_BASE_MSR_ADDR_MASK;
+		msr.lo |= LAPIC_DEFAULT_BASE;
+		msr.lo |= LAPIC_BASE_MSR_ENABLE;
+		wrmsr(LAPIC_BASE_MSR, msr);
+		msr = rdmsr(LAPIC_BASE_MSR);
+	}
+
+	ASSERT(msr.lo & LAPIC_BASE_MSR_ENABLE);
+
+	if (CONFIG(XAPIC_ONLY))
+		use_x2apic = false;
+	else if (CONFIG(X2APIC_ONLY))
+		use_x2apic = true;
+	else
+		use_x2apic = cpu_has_x2apic_support();
+
+	apic_base = msr.lo & LAPIC_BASE_MSR_ADDR_MASK;
+	ASSERT(apic_base == LAPIC_DEFAULT_BASE);
+
+	if (use_x2apic == !!(msr.lo & LAPIC_BASE_MSR_X2APIC_MODE)) {
+
+	} else if (use_x2apic) {
+		msr.lo |= LAPIC_BASE_MSR_X2APIC_MODE;
+		wrmsr(LAPIC_BASE_MSR, msr);
+	}

printk(BIOS_INFO, "Setting up local APIC...\n");
    printk(BIOS_DEBUG, " apic_id: 0x%x ", lapicid());
@@ -27,7 +58,7 @@
 {
    msr_t msr;
    msr = rdmsr(LAPIC_BASE_MSR);
-	msr.lo &= ~LAPIC_BASE_MSR_ENABLE;
+	msr.lo &= ~(LAPIC_BASE_MSR_ENABLE | LAPIC_BASE_MSR_X2APIC_MODE);
    wrmsr(LAPIC_BASE_MSR, msr);
 }