[coreboot-gerrit] Change in coreboot[master]: mb/intel/tglrvp: add Tiger Lake memory initialization support

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38998 )

Change subject: mb/intel/tglrvp: add Tiger Lake memory initialization support
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Patch Set 15:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38998/13/src/mainboard/intel/tglrvp... 
File src/mainboard/intel/tglrvp/romstage_fsp_params.c:

https://review.coreboot.org/c/coreboot/+/38998/13/src/mainboard/intel/tglrvp... 
PS13, Line 48: 		spd_index = SPD_ID_MICRON;
> default case to chose a more generic/stable spd if we get a board_id not in list.

Then add a comment, that MICRON is the most generic one? Maybe in the console message below.