Attention is currently required from: Angel Pons, Bill XIE, Nicholas Chin.
Keith Hui has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/85413?usp=email )
Change subject: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes ......................................................................
Patch Set 7:
(1 comment)
File src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c:
https://review.coreboot.org/c/coreboot/+/85413/comment/a2303b3d_ac45f391?usp... : PS7, Line 104: 0x40
So the values we need are: 0x70, 0x40, 0x20. […]
My understanding so far: 0x70: x4 or Setup[0x820] == 1 (This is confirmed; you can use it to verify the read, see below) 0x40: ASM1061 or Setup[0x820] == 0 0x20: PCIEX1_2 or Setup[0x820] == 2
Setup is an EFI variable, and I need a name for these values. So I need another test from you:
1. Go back to vendor BIOS. 2. Check that the EFI variables are mounted: ``` # mount ... efivarfs on /sys/firmware/efi/efivars type efivarfs (rw,... ``` The file we need is Setup-ec87d643-*. If I read my disassembly right, it should be 2141 +/- 5 bytes. 3. Set the PCIEX16_3 bandwidth option to each possible option and check back here to give these values a name.
I'm not sure if the UEFI GetVariable call strips the 4 bytes of attributes in front from the data, but they are there if you read through efivarfs. If the values don't make sense, try offset 0x824 or cut 4 bytes from the head instead.
In the meantime, get a(nother) backup SPI flash chip. The next patch set I upload will be the whole thing, including the part that reflashes the IFD. You should have a known good coreboot build on hand and be ready to recover from a botched flash.