Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40861 )
Change subject: mb/intel/tglrvp: Enable recovery in TGL RVP ......................................................................
mb/intel/tglrvp: Enable recovery in TGL RVP
Share "EC in RW" GPIO with depthcharge. Also we define the CONFIGS needed CHROME, CHROME_EC and use the chrome lid and recovery.
BUG=None BRANCH=None TEST=Build and boot TGL RVP. Check recovery works with crossystem recovery_request.
Change-Id: I1e88200e3f8418e5b0ab39ac65ed1b3545ce111e Signed-off-by: Shaunak Saha shaunak.saha@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/40861 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Wonkyu Kim wonkyu.kim@intel.com Reviewed-by: Srinidhi N Kaushik srinidhi.n.kaushik@intel.com --- M src/mainboard/intel/tglrvp/Kconfig M src/mainboard/intel/tglrvp/chromeos.c 2 files changed, 10 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Shaunak Saha: Looks good to me, approved Srinidhi N Kaushik: Looks good to me, approved Wonkyu Kim: Looks good to me, approved
diff --git a/src/mainboard/intel/tglrvp/Kconfig b/src/mainboard/intel/tglrvp/Kconfig index cfebc6b..8277875 100644 --- a/src/mainboard/intel/tglrvp/Kconfig +++ b/src/mainboard/intel/tglrvp/Kconfig @@ -16,10 +16,15 @@ select SOC_INTEL_TIGERLAKE select INTEL_LPSS_UART_FOR_CONSOLE select DRIVERS_INTEL_ISH + select EC_ACPI
config CHROMEOS bool default y + select EC_GOOGLE_CHROMEEC_SWITCHES if TGL_CHROME_EC + select GBB_FLAG_FORCE_MANUAL_RECOVERY + select HAS_RECOVERY_MRC_CACHE + select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN select GBB_FLAG_FORCE_DEV_SWITCH_ON select GBB_FLAG_FORCE_DEV_BOOT_USB
@@ -68,9 +73,9 @@ config TGL_CHROME_EC bool "Chrome EC" select EC_GOOGLE_CHROMEEC + select EC_GOOGLE_CHROMEEC_LPC select EC_GOOGLE_CHROMEEC_ESPI select EC_GOOGLE_CHROMEEC_BOARDID - select EC_ACPI
config TGL_INTEL_EC bool "Intel EC" @@ -81,8 +86,6 @@ config VBOOT select VBOOT_LID_SWITCH select VBOOT_MOCK_SECDATA - select HAS_RECOVERY_MRC_CACHE - select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN
config UART_FOR_CONSOLE int diff --git a/src/mainboard/intel/tglrvp/chromeos.c b/src/mainboard/intel/tglrvp/chromeos.c index 70a92f2..7da61be 100644 --- a/src/mainboard/intel/tglrvp/chromeos.c +++ b/src/mainboard/intel/tglrvp/chromeos.c @@ -12,10 +12,12 @@ {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, + {-1, ACTIVE_HIGH, 0, "EC in RW"}, }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); }
+#if !CONFIG(EC_GOOGLE_CHROMEEC_SWITCHES) int get_lid_switch(void) { /* Lid always open */ @@ -27,6 +29,8 @@ return 0; }
+#endif /*!CONFIG(EC_GOOGLE_CHROMEEC_SWITCHES) */ + int get_write_protect_state(void) { /* No write protect */