Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50420 )
Change subject: mb/google/zork: modify ELAN TP i2c IRQ to LEVEL active for dirinboz ......................................................................
mb/google/zork: modify ELAN TP i2c IRQ to LEVEL active for dirinboz
configure IRQs as level triggered to prevent TP lost.
BUG=None BRANCH=zork TEST=1. emerge-zork coreboot chromeos-bootimage 2. power on, suspend DUT to check TP is functional
Change-Id: I81ffa889fbdfb01bf3057a8258fb4dd4ad7e88d5 Signed-off-by: Kevin Chiu kevin.chiu@quantatw.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/50420 Reviewed-by: Sam McNally sammc@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/zork/variants/dirinboz/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Sam McNally: Looks good to me, approved
diff --git a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb index 283b1fc..43f4ff7 100644 --- a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb @@ -111,7 +111,7 @@ chip drivers/i2c/generic register "hid" = ""ELAN0000"" register "desc" = ""ELAN Touchpad"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)" + register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_9)" register "wake" = "GEVENT_22" register "probed" = "1" device i2c 15 on end