Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42807 )
Change subject: soc/amd/common: Separate single GPIO programming ......................................................................
soc/amd/common: Separate single GPIO programming
Do this to reduce indentation a bit. Also it may be desireable to group GPIO configuration such that some GPIOs are handled outside program_gpios() call and would not be included in gpio_list array.
Change-Id: I46cbe33f4d85cd9c7d70f96df82ee9b8ffe50a00 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/amd/common/block/gpio_banks/gpio.c 1 file changed, 63 insertions(+), 55 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/42807/1
diff --git a/src/soc/amd/common/block/gpio_banks/gpio.c b/src/soc/amd/common/block/gpio_banks/gpio.c index b73b836..079bba2 100644 --- a/src/soc/amd/common/block/gpio_banks/gpio.c +++ b/src/soc/amd/common/block/gpio_banks/gpio.c @@ -200,14 +200,71 @@
__weak void soc_gpio_hook(uint8_t gpio, uint8_t mux) {}
-void program_gpios(const struct soc_amd_gpio *gpio_list_ptr, size_t size) +static void set_single_gpio(const struct soc_amd_gpio *gpio_list_ptr, + struct sci_trigger_regs *sci_trigger_cfg) { uint32_t control, control_flags; - uint8_t mux, index, gpio; + uint8_t mux, gpio; + static const struct soc_amd_event *gev_tbl; + static size_t gev_items; int gevent_num; - const struct soc_amd_event *gev_tbl; + + if (gev_tbl == NULL) + soc_get_gpio_event_table(&gev_tbl, &gev_items); + + gpio = gpio_list_ptr->gpio; + mux = gpio_list_ptr->function; + control = gpio_list_ptr->control; + control_flags = gpio_list_ptr->flags; + + __iomux_write8(gpio, mux & AMD_GPIO_MUX_MASK); + __iomux_read8(gpio); /* Flush posted write */ + + soc_gpio_hook(gpio, mux); + + if (control_flags & GPIO_SPECIAL_FLAG) { + gevent_num = get_gpio_gevent(gpio, gev_tbl, gev_items); + if (gevent_num < 0) { + printk(BIOS_WARNING, "Warning: GPIO pin %d has" + " no associated gevent!\n", gpio); + continue; + } + switch (control_flags & GPIO_SPECIAL_MASK) { + case GPIO_DEBOUNCE_FLAG: + __gpio_setbits32(gpio, GPIO_DEBOUNCE_MASK, control); + break; + case GPIO_WAKE_FLAG: + __gpio_setbits32(gpio, INT_WAKE_MASK, control); + break; + case GPIO_INT_FLAG: + __gpio_setbits32(gpio, AMD_GPIO_CONTROL_MASK, control); + break; + case GPIO_SMI_FLAG: + __gpio_setbits32(gpio, INT_SCI_SMI_MASK, control); + + program_smi(control_flags & FLAGS_TRIGGER_MASK, gevent_num); + break; + case GPIO_SCI_FLAG: + __gpio_setbits32(gpio, INT_SCI_SMI_MASK, control); + + fill_sci_trigger(control_flags & FLAGS_TRIGGER_MASK, gevent_num, + &sci_trigger_cfg); + soc_route_sci(gevent_num); + break; + default: + printk(BIOS_WARNING, "Error, flags 0x%08x\n", + control_flags); + break; + } + } else { + __gpio_setbits32(gpio, AMD_GPIO_CONTROL_MASK, control); + } +} + +void program_gpios(const struct soc_amd_gpio *gpio_list_ptr, size_t size) +{ struct sci_trigger_regs sci_trigger_cfg = { }; - size_t gev_items; + size_t index;
/* * Disable blocking wake/interrupt status generation while updating @@ -221,57 +278,8 @@ */ master_switch_clr(GPIO_MASK_STS_EN | GPIO_INTERRUPT_EN);
- soc_get_gpio_event_table(&gev_tbl, &gev_items); - - for (index = 0; index < size; index++) { - gpio = gpio_list_ptr[index].gpio; - mux = gpio_list_ptr[index].function; - control = gpio_list_ptr[index].control; - control_flags = gpio_list_ptr[index].flags; - - __iomux_write8(gpio, mux & AMD_GPIO_MUX_MASK); - __iomux_read8(gpio); /* Flush posted write */ - - soc_gpio_hook(gpio, mux); - - if (control_flags & GPIO_SPECIAL_FLAG) { - gevent_num = get_gpio_gevent(gpio, gev_tbl, gev_items); - if (gevent_num < 0) { - printk(BIOS_WARNING, "Warning: GPIO pin %d has" - " no associated gevent!\n", gpio); - continue; - } - switch (control_flags & GPIO_SPECIAL_MASK) { - case GPIO_DEBOUNCE_FLAG: - __gpio_setbits32(gpio, GPIO_DEBOUNCE_MASK, control); - break; - case GPIO_WAKE_FLAG: - __gpio_setbits32(gpio, INT_WAKE_MASK, control); - break; - case GPIO_INT_FLAG: - __gpio_setbits32(gpio, AMD_GPIO_CONTROL_MASK, control); - break; - case GPIO_SMI_FLAG: - __gpio_setbits32(gpio, INT_SCI_SMI_MASK, control); - - program_smi(control_flags & FLAGS_TRIGGER_MASK, gevent_num); - break; - case GPIO_SCI_FLAG: - __gpio_setbits32(gpio, INT_SCI_SMI_MASK, control); - - fill_sci_trigger(control_flags & FLAGS_TRIGGER_MASK, gevent_num, - &sci_trigger_cfg); - soc_route_sci(gevent_num); - break; - default: - printk(BIOS_WARNING, "Error, flags 0x%08x\n", - control_flags); - break; - } - } else { - __gpio_setbits32(gpio, AMD_GPIO_CONTROL_MASK, control); - } - } + for (index = 0; index < size; index++) + set_single_gpio(&gpio_list_ptr[index], &sci_trigger_cfg);
/* * Re-enable interrupt status generation.