[coreboot-gerrit] Change in coreboot[master]: [RFC] Documentation/fsp: Discuss FSP-S issues

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36328 )

Change subject: [RFC] Documentation/fsp: Discuss FSP-S issues
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Patch Set 5:

(1 comment)

https://review.coreboot.org/c/coreboot/+/36328/4/Documentation/fsp/fsp-s_dis... 
File Documentation/fsp/fsp-s_discussion.md:

https://review.coreboot.org/c/coreboot/+/36328/4/Documentation/fsp/fsp-s_dis... 
PS4, Line 15: * `FSP-M`: Initializes the memory (DRAM) controller, among other
> The difference between FSP-M stuff and FSP-S stuff is that the former touches PHY stuff much more than the latter. And stuff surrounding PHY technology is usually kept very secret. Maybe PHYs are made out of arcane magic?

If I had to hazard a guess, SoC vendors are probably licensing at least some of this IP from other companies, and so I'm sure their licensing agreements would not allow publishing lots of details.
I would also bet the same is true for the memory controllers, hence secrecy around MRC.