Hello ashk@codeaurora.org,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/35505
to review the following change.
Change subject: trogdor: Add T32 scripts for full boot chain ......................................................................
trogdor: Add T32 scripts for full boot chain
Change-Id: I4ec1d4f722523f240fa293dd79235ab4e32e4489 Signed-off-by: ashk ashk@codeaurora.org --- M util/qualcomm/scripts/cmm/debug_cb_common.cmm A util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm A util/qualcomm/scripts/cmm/pbl_to_depthcharge.cmm 3 files changed, 229 insertions(+), 51 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/35505/1
diff --git a/util/qualcomm/scripts/cmm/debug_cb_common.cmm b/util/qualcomm/scripts/cmm/debug_cb_common.cmm index 5959ee1..cc3dd38 100644 --- a/util/qualcomm/scripts/cmm/debug_cb_common.cmm +++ b/util/qualcomm/scripts/cmm/debug_cb_common.cmm @@ -163,22 +163,28 @@ enter )
+ +;;;; START OF COMMENTED OUT CODE TO SKIP QCLIB DEBUG + ; go &QCLEntryAddr ; wait !run() -; + ; if &QCLStage ; ( -; &imgpath="3rdparty\blobs\soc\qualcomm\sdm845\QcLib.elf" + ; if (&RAMLoad) -; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /noclear -; else -; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode /noclear -; +; d.load \snowcone\builds792\PROD\BOOT.XF.3.1-00315-SC7180LCB-1\boot_images\Build\Rennell_qclib\DEBUG_CLANG60LINUX\AARCH64\QcomPkg\QCLib\QcLibCommon\DEBUG\QcLib.dll +; else +; d.load \snowcone\builds792\PROD\BOOT.XF.3.1-00315-SC7180LCB-1\boot_images\Build\Rennell_qclib\DEBUG_CLANG60LINUX\AARCH64\QcomPkg\QCLib\QcLibCommon\DEBUG\QcLib.dll + + ; print %String "Now the control is in QCLStage, press enter after debugging to go to next stage" ; print %String "Press enter to go to next stage" ; enter ; )
+;;;; END OF QCLIB COMMENTED OUT CODE + go &RAMEntryAddr wait !run()
@@ -193,26 +199,6 @@ print %String "Press enter to go to next stage" enter ) - -; BL31 disabled for now -; Next block of code commented out -; go &BL31EntryAddr -; wait !run() -; -; if &BL31Stage -; ( -; &imgpath="build\bl31.elf" -; if (&RAMLoad) -; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath -; else -; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode -; y.spath.srd 3rdparty/arm-trusted-firmware -; print %String "Now the control is in BL31, press enter after debugging to go to next stage" -; print %String "Press enter to go to next stage" -; enter -; ) -; End of commented out code block: bl31 - go &DCEntryAddr wait !run()
@@ -220,36 +206,17 @@ ( &imgpath="payloads\external\depthcharge\depthcharge\build\depthcharge.elf" symbol.sourcepath.setbasedir &srcpath\payloads + y.spath.srd payloads\external\depthcharge\depthcharge\src if (&RAMLoad) d.load.elf &imgpath /strippart "payloads" /sourcepath &srcpath else d.load.elf &imgpath /strippart "payloads" /sourcepath &srcpath /nocode - b.d /all - b.set main - b.set halt - b.set &KernelEntryAddr ; kernel entry point - y.spath.srd + payloads/external/depthcharge/depthcharge - y.spath.srd + 3rdparty\vboot_reference - d.dump &RamConsoleAddr /spotlight - &CBTablePtr=Register(X0) - Data.SAVE.Binary CBTablePtr.bin &CBTablePtr++0x400 - print %String "Now the control is in Depthcharge, press enter after debugging to run free" - ;print %String "Use this command to load kernel symbols: d.load.elf vmlinux /nocode /strippart kernel" - print %String "Press enter when done debugging Depthcharge" - enter + print %String "Now the control is in depthcharge, end of script" + d.l + b.s main + ;Execute this command in T32 if you start debugging vboot code, e.g. vboot_select_and_load_kernel() + ;y.spath.srd 3rdparty\vboot\firmware )
-; go &KernelEntryAddr -; wait !run() -; -; if &KernelSyms -; ( -; print %String "Kernel Symbols are being loaded, this requires two files in coreboot root tree:" -; print %String "vmlinux needs to be copied from ChromiumOS build tree" -; print %String "msm-4.4 needs to be symbolic link to kernel source tree" -; d.load.elf vmlinux /strippart "msm-4.4" /nocode -; y.spath.srd msm-4.4 -; print %String "This script now concludes at kernel entry point" -; )
enddo diff --git a/util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm b/util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm new file mode 100644 index 0000000..276bf45 --- /dev/null +++ b/util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm @@ -0,0 +1,158 @@ +;============================================================================ +;## +;## This file is part of the coreboot project. +;## +;## Copyright (C) 2019, The Linux Foundation. All rights reserved. +;## +;## This program is free software; you can redistribute it and/or modify +;## it under the terms of the GNU General Public License version 2 and +;## only version 2 as published by the Free Software Foundation. +;## +;## This program is distributed in the hope that it will be useful, +;## but WITHOUT ANY WARRANTY; without even the implied warranty of +;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;## GNU General Public License for more details. +;## +;============================================================================ +; Name: +; debug_cb_trogdor.cmm +; +; Description: +; Debug coreboot trogdor front-end +;============================================================================ + +;============================================================================ +; CMM script variables +;============================================================================ + +LOCAL &TargetPkg + +GLOBAL &BBEntryAddr // Bootblock Entry +GLOBAL &BBExitAddr // Bootblock Exit to Xbl-Sec +GLOBAL &VEREntryAddr // Verstage Entry +GLOBAL &ROMEntryAddr // Romstage Entry +GLOBAL &QCLEntryAddr // QCLstage Entry +GLOBAL &RAMEntryAddr // Ramstage Entry +GLOBAL &BL31EntryAddr // BL31 Entry +GLOBAL &DCEntryAddr // Depthcharge Entry +GLOBAL &KernelEntryAddr // Kernel Entry + +GLOBAL &PreRamConsoleAddr +GLOBAL &RamConsoleAddr +GLOBAL &PreRamCbfsCache +GLOBAL &VBoot2Work +GLOBAL &Stack +GLOBAL &Ttb +GLOBAL &Timestamp +GLOBAL &CbmemTop +GLOBAL &PostRamCbfsCache + +GLOBAL &CBTablePtr +GLOBAL &debug +;============================================================================ + +;--------------------------------------------------- +; Entry point +;--------------------------------------------------- +ENTRY &ImageName + + // Later these can be parameterized + &TargetPkg="trogdorPkg" + + // These settings come from .../src/soc/qualcomm/sc7180/include/soc/memlayout.ld + &BBEntryAddr=0x14815000 + &VEREntryAddr=0x14680000 + &ROMEntryAddr=0x14680000 + &QCLEntryAddr=0x14881950 + &RAMEntryAddr=0x9F860000 + &BL31EntryAddr=0x06820000 + &DCEntryAddr=0xF1000000 + &KernelEntryAddr=0xD0000000 + + &PreRamConsoleAddr=0x14830800 + &VBoot2Work=0x1482E000 + &Stack=0x14847000 + &Ttb=0x14839000 + &Timestamp=0x14838800 + &PreRamCbfsCache=0x1481F000 + &CbmemTop=0x280000000 + &PostRamCbfsCache=0x9F800000 + // End of memlayout.ld settings + + // Common commands irrespective of &Mode + PATH + &CwDir=os.pwd() + PATH + &CwDir + + // position at top of coreboot tree + // find depth count for source loading + cd ........ + &srcpath=os.pwd() + + +;--------------------------------------------------- +; Setup area and log +;--------------------------------------------------- + area.clear + area.reset + area.create CB_Logs 1000. 8192. + area.select CB_Logs + + area.view CB_Logs + + PRINT %String "Source Path: &srcpath" + + symbol.sourcepath.setbasedir &srcpath\src + + // Make parsing simple, upper-case parameters + &ImageName=STRING.UPR("&ImageName") + IF (STR.CP("&ImageName","DEBUG,*")) + ( + &debug="DEBUG" + ) + ELSE + ( + &debug="" + ) + &ImageName=STR.CUT("&ImageName",6) + IF "&debug"=="" + ( + PRINT "SPI_RAM LOAD" + &ImageName=STRING.UPR("&ImageName") + IF "&ImageName"=="" + ( + &ImageName="RAM,BB" //for RAM load Bootblock only and jump till DC + ) + PRINT "&ImageName" + ) + ELSE + ( + if (STR.CP("&debug","DEBUG")) + ( + PRINT "DEBUG" + &ImageName=STRING.UPR("&ImageName") + IF "&ImageName"=="" + ( + &ImageName="RAM,ALL" //for RAM loading all the images + ) + PRINT "&ImageName" + ) + ) + + sys.d + sys.up + b.d + y.reset + D.S EZAXI:0xC260208 %LE %Long 0x80000000 + + b.s 0x148e7000 /o + go + WAIT !STATE.RUN() + + b.s 0x14815000 /o + go + WAIT !STATE.RUN() + + DO debug_cb_common.cmm &TargetPkg &srcpath &xblsrcpath &ImageName + + enddo diff --git a/util/qualcomm/scripts/cmm/pbl_to_depthcharge.cmm b/util/qualcomm/scripts/cmm/pbl_to_depthcharge.cmm new file mode 100644 index 0000000..9205d67 --- /dev/null +++ b/util/qualcomm/scripts/cmm/pbl_to_depthcharge.cmm @@ -0,0 +1,53 @@ +sys.d +sys.up +b.d +y.reset + +d.load.elf \ashk-linux\workspace\ashk\pbl_script\FBC_validation\APPS_PBL.elf + +b.s sec_ctrl_drv_ioctl\273+0xC /P /CMD "r.s x6 0x12345678" /resume +b.s pbl_recoverable_error_handler /o +b.s pbl_non_recoverable_error_handler /o + +snoop.PC on + +b.s 0x148e7000 /o +go +WAIT !STATE.RUN() + +b.s 0x14815000 /o +go +WAIT !STATE.RUN() + +b.d +b.s 0x14680000 /o +go +WAIT !STATE.RUN() + +b.d +b.s 0x14680000 /o +go +WAIT !STATE.RUN() + +b.d +b.s 0x14881950 /o +go +WAIT !STATE.RUN() + +d.load \ashk-linux\workspace\ashk\test_qclib_8_7\boot.xf.3.1.test_qclib_8_7\boot_images\Build\Rennell_qclib\DEBUG_CLANG60LINUX\AARCH64\QcomPkg\QCLib\QcLibCommon\DEBUG\QcLib.dll +do \ashk-linux\workspace\ashk\test_qclib_8_7\boot.xf.3.1.test_qclib_8_7\boot_images\QcomPkg\Tools\qclib\qclib_rennell_only_stub_coreboot.cmm + +b.d +b.s 0x9f860000 /o +go +WAIT !STATE.RUN() + +b.d +b.s 0x80c00000 /o +go +WAIT !STATE.RUN() + +b.d +b.s 0xF1000000 /o +go +WAIT !STATE.RUN()