build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31150 )
Change subject: nb/intel/sandybridge: Reserve CAR region with !NATIVE_RAMINIT
......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/#/c/31150/2/src/northbridge/intel/sandybridge/ra...
File src/northbridge/intel/sandybridge/raminit_mrc.c:
https://review.coreboot.org/#/c/31150/2/src/northbridge/intel/sandybridge/ra...
PS2, Line 267: (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)
please, no spaces at the start of a line
https://review.coreboot.org/#/c/31150/2/src/northbridge/intel/sandybridge/ra...
PS2, Line 294: mrc_var = (void*)DCACHE_RAM_MRC_VAR_BASE;
"(foo*)" should be "(foo *)"
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ibc771b592b35d77be81fce87769314fe6bb84c87
Gerrit-Change-Number: 31150
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Gerrit-Comment-Date: Thu, 31 Jan 2019 05:06:31 +0000
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