Hello Aamir Bohra,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/48459
to review the following change.
Change subject: soc/intel/alderlake: Disable HWP support ......................................................................
soc/intel/alderlake: Disable HWP support
Change-Id: I88c9907cdbe9d237f058f5362db42276ecf4770b Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/alderlake/fsp_params.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/48459/1
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index a21ca4a..f176785 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -273,7 +273,7 @@ sizeof(config->PcieRpClkReqDetect));
params->PmSupport = 1; - params->Hwp = 1; + params->Hwp = 0; params->Cx = 1; params->PsOnEnable = 1;