Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43214 )
Change subject: soc/intel/broadwell/pcie.c: Drop dead code ......................................................................
soc/intel/broadwell/pcie.c: Drop dead code
This code is not even being build-tested. Drop it before it grows moss.
Change-Id: Ia314148abc900685d85aede3add480614fa8e99c Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/broadwell/pcie.c 1 file changed, 0 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/43214/1
diff --git a/src/soc/intel/broadwell/pcie.c b/src/soc/intel/broadwell/pcie.c index 9eb14d9..14dcd3f 100644 --- a/src/soc/intel/broadwell/pcie.c +++ b/src/soc/intel/broadwell/pcie.c @@ -590,18 +590,6 @@ reg16 |= PCI_BRIDGE_CTL_NO_ISA; pci_write_config16(dev, PCI_BRIDGE_CONTROL, reg16);
-#ifdef EVEN_MORE_DEBUG - u32 reg32; - reg32 = pci_read_config32(dev, 0x20); - printk(BIOS_SPEW, " MBL = 0x%08x\n", reg32); - reg32 = pci_read_config32(dev, 0x24); - printk(BIOS_SPEW, " PMBL = 0x%08x\n", reg32); - reg32 = pci_read_config32(dev, 0x28); - printk(BIOS_SPEW, " PMBU32 = 0x%08x\n", reg32); - reg32 = pci_read_config32(dev, 0x2c); - printk(BIOS_SPEW, " PMLU32 = 0x%08x\n", reg32); -#endif - /* Clear errors in status registers */ reg16 = pci_read_config16(dev, 0x06); pci_write_config16(dev, 0x06, reg16);