Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37212 )
Change subject: arch/x86/exit_car.S: Make sure _cbmem_top_ptr hits dram ......................................................................
arch/x86/exit_car.S: Make sure _cbmem_top_ptr hits dram
INVD is called below so if postcar is running in a cached environment it needs to happen.
NOTE: postcar cannot execute in a cached environment if clflush is not supported!
Change-Id: I37681ee1f1d2ae5f9dd824b5baf7b23b2883b1dc Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/arch/x86/exit_car.S 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/37212/1
diff --git a/src/arch/x86/exit_car.S b/src/arch/x86/exit_car.S index 8c28784..ceb0321 100644 --- a/src/arch/x86/exit_car.S +++ b/src/arch/x86/exit_car.S @@ -38,7 +38,14 @@ movl 4(%esp), %eax movl %eax, _cbmem_top_ptr #endif + /* Make sure _cbmem_top_ptr hits dram before invd */ + movl $1, %eax + cpuid + btl $19, %edx + jz skip_clflush + clflush _cbmem_top_ptr
+skip_clflush: /* chipset_teardown_car() is expected to disable cache-as-ram. */ call chipset_teardown_car