Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44198 )
Change subject: soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices ......................................................................
soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices
On PCH-H the I2C4 0:19.0 device isn't usable and thus 0:19.1 and 0:19.2 can't be detected using standard PCI probing.
Remove I2C4, I2C5 and UART2 from generic ASL code on PCH-H platforms.
Change-Id: I89f9ab7d4afb2e7d1b1e24d072adf99e0da6fecf Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/cannonlake/acpi/serialio.asl 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/44198/1
diff --git a/src/soc/intel/cannonlake/acpi/serialio.asl b/src/soc/intel/cannonlake/acpi/serialio.asl index e4a675e..d88c570 100644 --- a/src/soc/intel/cannonlake/acpi/serialio.asl +++ b/src/soc/intel/cannonlake/acpi/serialio.asl @@ -26,6 +26,7 @@ Name (_DDN, "Serial IO I2C Controller 3") }
+#if !CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) Device (I2C4) { Name (_ADR, 0x00190000) @@ -37,6 +38,7 @@ Name (_ADR, 0x00190001) Name (_DDN, "Serial IO I2C Controller 5") } +#endif
Device (SPI0) { @@ -56,6 +58,7 @@ Name (_DDN, "Serial IO SPI Controller 2") }
+#if !CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) Device (UAR0) { Name (_ADR, 0x001e0000) @@ -73,3 +76,4 @@ Name (_ADR, 0x00190002) Name (_DDN, "Serial IO UART Controller 2") } +#endif