[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Fix PMC and GPIO block values for PCH-H

[Jeremy Soller (Code Review)]

Jeremy Soller has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33941 )

Change subject: soc/intel/cannonlake: Fix PMC and GPIO block values for PCH-H
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Patch Set 4:

(3 comments)

I have updated my commit message, hopefully that provides more information

https://review.coreboot.org/#/c/33941/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/#/c/33941/2//COMMIT_MSG@9 
PS2, Line 9: In order for GPEs to work properly
> this part doesn't really fit the following sentence?

Done

https://review.coreboot.org/#/c/33941/2//COMMIT_MSG@13 
PS2, Line 13: GPP_E
            : GPP_F
            : GPP_H
            : GPP_I
            : GPP_J
            : GPP_K
            : GPD
> This is visible from the diff, no need to list them here. […]

Done

https://review.coreboot.org/#/c/33941/2//COMMIT_MSG@23 
PS2, Line 23: after applying this change.
> Please adhere to the 72 char line limit in commit messages.

Done