[coreboot-gerrit] Change in coreboot[master]: cpu/x86/smm: Enable SMM support for Xeon-SP

[Rocky Phagura (Code Review)]

Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Eugene Myers, Jonathan Zhang, David Hendricks, Naresh Solanki, Aaron Durbin, Patrick Rudolph, Ron Minnich, Eugene Myers,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41829

to look at the new patch set (#7).

Change subject: cpu/x86/smm: Enable SMM support for Xeon-SP
......................................................................

cpu/x86/smm: Enable SMM support for Xeon-SP

Xeon-SP a skylake based system has 36 CPU threads (18 cores). Current coreboot
SMM is unable to handle more than ~32 CPU threads. The state save area begins
to encroach upon the entry code and thus the system can hang, reboot, etc. This
patch fixes those issues but it requires changes in common SMM code. The
staggered entry points with simple near jumps will not work anymore because
the CPUs have entry points larger than 0xFFFF. Current SMM code architecture
assumes code will be within 0xFFFF (near jumps) before entering protected mode.
Therfore, this patch installs the same stub code for each CPU thread. The
following steps outline the flow and step #1 is now removed. CPUs will enter
right at step #2.
1. jump to smm stub code (step #2)
2. setup a stack (just like before)
2a. enter protected mode (just like before)
2b. jump to common SMI handling code (just like before)
3. resume/exit smm (just like before)

By making the modifications above, this allows the smm module loader to expand
easily as more CPU threads are added. By default all CPUs are relocated one at
a time.

TEST=build for Tiogapass platform under OCP mainboard. Enable the following in
Kconfig.
    select CPU_INTEL_COMMON_SMM
        select SOC_INTEL_COMMON_BLOCK_SMM
    select SMM_TSEG
    select HAVE_SMI_HANDLER
        select ACPI_INTEL_HARDWARE_SLEEP_VALUE

Debug console will show all 36 cores relocated. Further tested by generating
SMI's to port 0xb2 using XDP/ITP HW debugger and ensured all cores entering and
exiting SMM properly. In addition, booted to Linux 5.4 kernel and observed no
issues during mp init.

Change-Id: I78bd74c11ca42fb430f63711b5ec87d4bfe6ca2a
Signed-off-by: Rocky Phagura 
---
M src/cpu/x86/Makefile.inc
M src/cpu/x86/mp_init.c
M src/cpu/x86/smm/smm_module_loader.c
M src/include/cpu/x86/smm.h
M src/soc/intel/xeon_sp/Makefile.inc
A src/soc/intel/xeon_sp/smmrelocate.c
M src/soc/intel/xeon_sp/uncore.c
M src/southbridge/intel/common/smihandler.c
8 files changed, 577 insertions(+), 159 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/41829/7