[coreboot-gerrit] Change in ...coreboot[master]: {arch, console, drivers, include, lib, soc}: Add new features in postcar

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32667 )

Change subject: {arch, console, drivers, include, lib, soc}: Add new features in postcar
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Patch Set 8:
> > Patch Set 8:
> >
> > Answering size related questions:
> >
> > ToT Coreboot:
> >
> > bootblock: 59.1kB
> > romstage: 67.6kB
> > postcar: 24.0 kB
> > ramstage: 243.2kB
> >
> > with CB: 30985
> >
> > bootblock: 59.1kB
> > romstage: 67.6kB
> > postcar: 102.0kB
> >
> > [ignoring ramstage as we are not loading ramstage separately]
>
> Thanks for providing real numbers! Looking at the timestamp
> ramstage booting time could be reduced by 330msec if you skip (or
> minimize the code that is run):

[Subrata] yes. right now CB:30985 only incorporate the skip ramstage logic but i remember that i had also execute something that you mentioned, like not calling everything from ramstage, just jump into ramstage and call payload_init() function to load minimum stuff to boot OS.
> FspNotify(EndOfFirmware) 70msec
> device enumeration 136msec
> device configuration 24msec
> device initialization 16msec
> device setup done 86msec
>
> This seems to be the same amount you gain from moving all the code
> to postcar.