[coreboot-gerrit] [XS] Change in coreboot[main]: mb/asrock/h77pro4-m: Add SMBIOS slot descriptions

[Matt DeVillier (Code Review)]

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85760?usp=email )

(

2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: mb/asrock/h77pro4-m: Add SMBIOS slot descriptions
......................................................................

mb/asrock/h77pro4-m: Add SMBIOS slot descriptions

Based mostly on the comments in the file. Physical slot lengths
checked from manufacturer's specs online.

TEST: It still builds

Change-Id: I706910dd192ca3415082955a7611d17702d3cfba
Signed-off-by: Riku Viitanen 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85760
Tested-by: build bot (Jenkins) 
Reviewed-by: Felix Singer 
---
M src/mainboard/asrock/h77pro4-m/devicetree.cb
1 file changed, 6 insertions(+), 1 deletion(-)

Approvals:
  Felix Singer: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/mainboard/asrock/h77pro4-m/devicetree.cb b/src/mainboard/asrock/h77pro4-m/devicetree.cb
index 581b9a5..469567e 100644
--- a/src/mainboard/asrock/h77pro4-m/devicetree.cb
+++ b/src/mainboard/asrock/h77pro4-m/devicetree.cb
@@ -6,7 +6,9 @@
    	device ref host_bridge on # Host bridge
    		subsystemid 0x1849 0x0100
    	end
-		device ref peg10 on end # PEG - slot "PCIE1"
+		device ref peg10 on # PEG - slot "PCIE1"
+			smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthLong" "PCIE1" "SlotDataBusWidth16X"
+		end
    	device ref igd on # iGPU
    		subsystemid 0x1849 0x0102
    	end
@@ -54,12 +56,14 @@
    		end
    		device ref pcie_rp1 on # PCIe Port #1 - slot "PCIE4", 4 lanes
    			subsystemid 0x1849 0x1e10
+				smbios_slot_desc "SlotTypePciExpressGen2X4" "SlotLengthLong" "PCIE4" "SlotDataBusWidth4X"
    		end
    		device ref pcie_rp2 off end # PCIe Port #2
    		device ref pcie_rp3 off end # PCIe Port #3
    		device ref pcie_rp4 off end # PCIe Port #4
    		device ref pcie_rp5 on # PCIe Port #5 - slot "PCIE2", 1 lane
    			subsystemid 0x1849 0x1e18
+				smbios_slot_desc "SlotTypePciExpressGen2X1" "SlotLengthShort" "PCIE2" "SlotDataBusWidth1X"
    		end
    		device ref pcie_rp6 on # PCIe Port #6 - RTL8111E GbE
    			subsystemid 0x1849 0x1e1a
@@ -67,6 +71,7 @@
    		end
    		device ref pcie_rp7 on # PCIe Port #7 - slot "PCIE3", 1 lane
    			subsystemid 0x1849 0x1e16
+				smbios_slot_desc "SlotTypePciExpressGen2X1" "SlotLengthLong" "PCIE3" "SlotDataBusWidth1X"
    		end
    		device ref pcie_rp8 on # PCIe Port #8 - ASM1061 SATA Controller
    			subsystemid 0x1849 0x1e1e