build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37303 )
Change subject: soc/intel/broadwell_de: Re-read SPD on CRC error
......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37303/3/src/soc/intel/fsp_broadwell...
File src/soc/intel/fsp_broadwell_de/romstage/memory.c:
https://review.coreboot.org/c/coreboot/+/37303/3/src/soc/intel/fsp_broadwell...
PS3, Line 82: if (res == SPD_STATUS_OK) {
braces {} are not necessary for single statement blocks
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Gerrit-Project: coreboot
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