Rizwan Qureshi (rizwan.qureshi@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18133
-gerrit
commit fc3baeae780e28be7026e7d17068c63a45d6ff22 Author: Rizwan Qureshi rizwan.qureshi@intel.com Date: Fri Jan 13 12:45:19 2017 +0530
mainboard/google/poppy: Update DQS and DQ Byte mappings for poppy
poppy schematics have undergone change after review, update DQS and DQ Byte mappings for poppy based on the new schematics.
Change-Id: Ie4532035f37c25540abb26122234f6e3346ede69 Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com Signed-off-by: Furquan Shaikh furquan@chromium.org --- src/mainboard/google/poppy/romstage.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mainboard/google/poppy/romstage.c b/src/mainboard/google/poppy/romstage.c index 70e93d8..790e5ae 100644 --- a/src/mainboard/google/poppy/romstage.c +++ b/src/mainboard/google/poppy/romstage.c @@ -25,14 +25,14 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; /* DQ byte map */ const u8 dq_map[2][12] = { - { 0xF0, 0x0F, 0x00, 0xF0, 0x0F, 0xF0, + { 0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0, 0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 }, - { 0x33, 0xCC, 0x00, 0x33, 0xCC, 0x33, + { 0xCC, 0x33, 0x00, 0x33, 0xCC, 0x33, 0xCC, 0x00, 0xFF, 0x00, 0xFF, 0x00 } }; /* DQS CPU<>DRAM map */ const u8 dqs_map[2][8] = { - { 0, 3, 1, 2, 4, 7, 6, 5 }, + { 2, 3, 1, 0, 4, 7, 6, 5 }, { 5, 6, 0, 3, 4, 7, 2, 1 }, }; /* Rcomp resistor */