Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37802 )
Change subject: documentation: Add documentation on setting up mainboard GPIOs ......................................................................
Patch Set 1:
(5 comments)
https://review.coreboot.org/c/coreboot/+/37802/1/Documentation/gpio.md File Documentation/gpio.md:
https://review.coreboot.org/c/coreboot/+/37802/1/Documentation/gpio.md@1 PS1, Line 1: # Configuring a mainboard's GPIOs in coreboot
you need to reference this file from an existing markdown
Oh yes. I'm thinking in the getting_started directory.
https://review.coreboot.org/c/coreboot/+/37802/1/Documentation/gpio.md@40 PS1, Line 40: Baytrail and Braswell, for example, simply expect the mainboard to supply a
nit: need blank line after markdown header lines
Done
https://review.coreboot.org/c/coreboot/+/37802/1/Documentation/gpio.md@67 PS1, Line 67: pre-silicon init, pre-RAM init, post-RAM init, etc. The GPIOs that are
you can drop the etc here
Done
https://review.coreboot.org/c/coreboot/+/37802/1/Documentation/gpio.md@84 PS1, Line 84: Intel SoCs can use a library which combines common configurations together
Mainboards using Intel SoCs?
Done
https://review.coreboot.org/c/coreboot/+/37802/1/Documentation/gpio.md@119 PS1, Line 119: This configuration is often hooked into the mainboard's `enable_dev` callback,
Is this not consistent across all boards? Maybe we should make it uniform across boards.
Some (older?) southbridges have a setup_pch_gpios() function called in romstage or early_init.