Change subject: [WIP] soc/intel/denverton_ns: Fix virtual PCIe root port interrupts
......................................................................
This change is ready for review.
--
To view, visit
https://review.coreboot.org/c/coreboot/+/37586
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I333c2afd1e40bcd7daa3df4ceb8e5c34d3489871
Gerrit-Change-Number: 37586
Gerrit-PatchSet: 1
Gerrit-Owner: Kyösti Mälkki
kyosti.malkki@gmail.com
Gerrit-Reviewer: David Guckian
david.guckian@intel.com
Gerrit-Reviewer: Kyösti Mälkki
kyosti.malkki@gmail.com
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: Vanessa Eusebio
vanessa.f.eusebio@intel.com
Gerrit-Reviewer: Дмитрий Понаморев
dponamorev@gmail.com
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-Comment-Date: Tue, 10 Dec 2019 14:32:28 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: No
Gerrit-MessageType: comment