Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/20599 )
Change subject: gma: Move GTT constants into GMA.Config ......................................................................
gma: Move GTT constants into GMA.Config
Change-Id: Ie4b017f26b658c1818f90701089ce5d3171e4953 Signed-off-by: Nico Huber nico.h@gmx.de Reviewed-on: https://review.coreboot.org/20599 Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Arthur Heymans arthur@aheymans.xyz --- M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-registers.adb M common/hw-gfx-gma-registers.ads 3 files changed, 22 insertions(+), 23 deletions(-)
Approvals: Nico Huber: Verified Paul Menzel: Looks good to me, but someone else must approve Arthur Heymans: Looks good to me, approved
diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index f40054c..dea26b8 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -268,4 +268,20 @@ HDMI_Max_Clock_24bpp : constant Frequency_Type := (if CPU >= Haswell then 300_000_000 else 225_000_000);
+ ---------------------------------------------------------------------------- + + GTT_Offset : constant := (case CPU is + when Ironlake .. Haswell => 16#0020_0000#, + when Broadwell .. Skylake => 16#0080_0000#); + + GTT_Size : constant := (case CPU is + when Ironlake .. Haswell => 16#0020_0000#, + -- Limit Broadwell to 4MiB to have a stable + -- interface (i.e. same number of entries): + when Broadwell .. Skylake => 16#0040_0000#); + + GTT_PTE_Size : constant := (case CPU is + when Ironlake .. Haswell => 4, + when Broadwell .. Skylake => 8); + end HW.GFX.GMA.Config; diff --git a/common/hw-gfx-gma-registers.adb b/common/hw-gfx-gma-registers.adb index 3c4ad57..e240152 100644 --- a/common/hw-gfx-gma-registers.adb +++ b/common/hw-gfx-gma-registers.adb @@ -12,16 +12,15 @@ -- GNU General Public License for more details. --
-with System.Storage_Elements; - with HW.Time; with HW.MMIO_Range; pragma Elaborate_All (HW.MMIO_Range);
+with HW.GFX.GMA.Config; + with HW.Debug; with GNAT.Source_Info;
-use type System.Address; use type HW.Word64;
package body HW.GFX.GMA.Registers @@ -47,28 +46,13 @@
----------------------------------------------------------------------------
- GTT_Offset : constant := (case Config.CPU is - when Ironlake .. Haswell => 16#0020_0000#, - when Broadwell .. Skylake => 16#0080_0000#); - - GTT_Size : constant := (case Config.CPU is - when Ironlake .. Haswell => 16#0020_0000#, - -- Limit Broadwell to 4MiB to have a stable - -- interface (i.e. same number of entries): - when Broadwell .. Skylake => 16#0040_0000#); - - GTT_PTE_Size : constant := (case Config.CPU is - when Ironlake .. Haswell => 4, - when Broadwell .. Skylake => 8); - - - type GTT_PTE_Type is mod 2 ** (GTT_PTE_Size * 8); + type GTT_PTE_Type is mod 2 ** (Config.GTT_PTE_Size * 8); type GTT_Registers_Type is array (GTT_Range) of GTT_PTE_Type with Volatile_Components, - Size => GTT_Size * 8; + Size => Config.GTT_Size * 8; package GTT is new MMIO_Range - (Base_Addr => Config.Default_MMIO_Base + GTT_Offset, + (Base_Addr => Config.Default_MMIO_Base + Config.GTT_Offset, Element_T => GTT_PTE_Type, Index_T => GTT_Range, Array_T => GTT_Registers_Type); @@ -310,7 +294,7 @@ is begin Regs.Set_Base_Address (Base); - GTT.Set_Base_Address (Base + GTT_Offset); + GTT.Set_Base_Address (Base + Config.GTT_Offset); end Set_Register_Base;
end HW.GFX.GMA.Registers; diff --git a/common/hw-gfx-gma-registers.ads b/common/hw-gfx-gma-registers.ads index f3825ea..e526417 100644 --- a/common/hw-gfx-gma-registers.ads +++ b/common/hw-gfx-gma-registers.ads @@ -14,7 +14,6 @@
with System; with HW.GFX.GMA; -with HW.GFX.GMA.Config;
private package HW.GFX.GMA.Registers with