Hello Kane Chen, Kangheui Won, Paul Menzel, Daniel Kurtz, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38494
to look at the new patch set (#6).
Change subject: drivers/net/r8168: Add SSDT Power Resource Methods ......................................................................
drivers/net/r8168: Add SSDT Power Resource Methods
Turns out when going into S0ix we want the kernel to toggle de-assert to 0 for the ISOLATE# pin on the NIC for S0ix not to be woken by PCIe traffic on PCH. Upon resume the ISOLATE# pin on the NIC is then re-asserted for it to become lively again.
V.2: Ensure reset_gpio && enable_gpio are optional.
BUG=b:147026979 BRANCH=none TEST=Boot puff and do 100 cycles of S0ix.
Change-Id: I3ae8dc30f45f55eec23f45e7b5fbc67a4542f87d Signed-off-by: Edward O'Callaghan quasisec@google.com --- M src/drivers/net/chip.h M src/drivers/net/r8168.c 2 files changed, 22 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/38494/6