Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45860 )
Change subject: mb/google/volteer/variants/eldrid: disable Fan Performance Control and Passive Policy ......................................................................
Patch Set 7:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45860/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45860/7//COMMIT_MSG@7 PS7, Line 7: mb/google/volteer/variants/eldrid: disable Fan Performance Control : and Passive Policy Please keep subject line to 72 chars; I suggest: mb/google/volteer: Add a DPTF policy for Eldrid
https://review.coreboot.org/c/coreboot/+/45860/7/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/eldrid/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/45860/7/src/mainboard/google/voltee... PS7, Line 61: device pci 04.0 on : # DPTF Policy for Eldrid board : chip drivers/intel/dptf : ## Active Policy : register "policies.active" = "{ : [0] = {.target = DPTF_CPU, : .thresholds = {TEMP_PCT(85, 90), : TEMP_PCT(80, 69), : TEMP_PCT(75, 56), : TEMP_PCT(70, 46), : TEMP_PCT(65, 36),}}, : [1] = {.target = DPTF_TEMP_SENSOR_0, : .thresholds = {TEMP_PCT(50, 90), : TEMP_PCT(47, 69), : TEMP_PCT(45, 56), : TEMP_PCT(42, 46), : TEMP_PCT(39, 36),}}, : [2] = {.target = DPTF_TEMP_SENSOR_1, : .thresholds = {TEMP_PCT(50, 90), : TEMP_PCT(47, 69), : TEMP_PCT(45, 56), : TEMP_PCT(42, 46), : TEMP_PCT(39, 36),}}, : [3] = {.target = DPTF_TEMP_SENSOR_2, : .thresholds = {TEMP_PCT(50, 90), : TEMP_PCT(47, 69), : TEMP_PCT(45, 56), : TEMP_PCT(42, 46), : TEMP_PCT(39, 36),}}, : [4] = {.target = DPTF_TEMP_SENSOR_3, : .thresholds = {TEMP_PCT(50, 90), : TEMP_PCT(47, 69), : TEMP_PCT(45, 56), : TEMP_PCT(42, 46), : TEMP_PCT(39, 36),}}}" : : ## Critical Policy : register "policies.critical" = "{ : [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), : [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN), : [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 75, SHUTDOWN), : [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 75, SHUTDOWN), : [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 75, SHUTDOWN)}" : : ## Power Limits Control : # 10-15W PL1 in 200mW increments, avg over 28-32s interval : # PL2 is fixed at 64W, avg over 28-32s interval : register "controls.power_limits" = "{ : .pl1 = {.min_power = 3000, : .max_power = 15000, : .time_window_min = 28 * MSECS_PER_SEC, : .time_window_max = 32 * MSECS_PER_SEC, : .granularity = 200,}, : .pl2 = {.min_power = 15000, : .max_power = 60000, : .time_window_min = 28 * MSECS_PER_SEC, : .time_window_max = 32 * MSECS_PER_SEC, : .granularity = 1000,}}" : : ## Charger Performance Control (Control, mA) : register "controls.charger_perf" = "{ : [0] = { 255, 1700 }, : [1] = { 24, 1500 }, : [2] = { 16, 1000 }, : [3] = { 8, 500 }}" : : device generic 0 on end : end : end I don't think this isn't doing what you're expecting here.
The variants all "inherit" the settings from the baseboard (on a per-register basis), so if you want to disable fan control & passive policy, you would have to do something like this:
``` device pci 04.0 on # DPTF Policy for Eldrid board chip drivers/intel/dptf # Disable Passive policy inherited from baseboard register "policies.passive" = "{[0] = DPTF_PASSIVE(NONE, NONE, 0, 0)}"
# Disable Active policy inherited from baseboard register "policies.active" = "{[0] = {.target = DPTF_NONE, .thresholds = {TEMP_PCT(0,0)}}}" device generic 0 on end end end
```
That will take all of the settings from the baseboard, but replace the passive and active with what is specified here (null policies basically). Sorry it's ugly, I will add something to make this cleaner.