[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso: Move SPI init calls into sb_spi_init()

[Furquan Shaikh (Code Review)]

Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40824 )

Change subject: soc/amd/picasso: Move SPI init calls into sb_spi_init()
......................................................................

soc/amd/picasso: Move SPI init calls into sb_spi_init()

This change adds a helper sb_spi_init() that makes all the required
calls for configuring SPI to ROM.

BUG=b:147758054,b:153675510
BRANCH=trembyle-bringup
TEST=Verified that SPI configuration is correct for trembyle.

Signed-off-by: Furquan Shaikh 
Change-Id: Ic5b395a8d3bdab449c24b05d1b6b8777e128b5e0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40824
Reviewed-by: Raul Rangel 
Reviewed-by: Aaron Durbin 
Tested-by: build bot (Jenkins) 
---
M src/soc/amd/picasso/southbridge.c
1 file changed, 15 insertions(+), 5 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Aaron Durbin: Looks good to me, approved
  Raul Rangel: Looks good to me, approved

diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c
index caf7171..c38f373 100644
--- a/src/soc/amd/picasso/southbridge.c
+++ b/src/soc/amd/picasso/southbridge.c
@@ -235,6 +235,20 @@
    write32((void *)(base + SPI_CNTRL0), val | SPI_READ_MODE(mode));
 }

+static void sb_spi_config_modes(void)
+{
+	sb_set_spi100(SPI_SPEED_33M, SPI_SPEED_33M,
+		      SPI_SPEED_16M, SPI_SPEED_16M);
+}
+
+static void sb_spi_init(void)
+{
+	lpc_enable_spi_prefetch();
+	sb_init_spi_base();
+	sb_disable_4dw_burst();
+	sb_spi_config_modes();
+}
+
 static void fch_smbus_init(void)
 {
    /* 400 kHz smbus speed. */
@@ -260,11 +274,7 @@
    if (CONFIG(POST_IO) && (CONFIG_POST_IO_PORT == 0x80)
    				&& CONFIG(PICASSO_LPC_IOMUX))
    	lpc_enable_port80();
-	lpc_enable_spi_prefetch();
-	sb_init_spi_base();
-	sb_disable_4dw_burst();
-	sb_set_spi100(SPI_SPEED_33M, SPI_SPEED_33M,
-			SPI_SPEED_16M, SPI_SPEED_16M);
+	sb_spi_init();
    enable_acpimmio_decode_pm04();
    fch_smbus_init();
    sb_enable_cf9_io();