Hello V Sowmya, build bot (Jenkins), Wonkyu Kim, Jamie Ryu, Rizwan Qureshi, Sridhar Siricilla, Raj Astekar,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44559
to look at the new patch set (#3).
Change subject: mb/google/volteer: Update SLP_Sx assertion widths and PwrCycDur ......................................................................
mb/google/volteer: Update SLP_Sx assertion widths and PwrCycDur
This patch updates the SLP_Sx assertion widths and power cycle duration for volteer.
Power cycle duration: With default value, S0->S5 -> [ ~4.2 seconds delay ] -> S5->S0
With value set to 1, S0->S5 -> [ ~1.2 seconds delay ] -> S5->S0
BUG=b:159108661 TEST=Verified that the power cycle duration is 1~2s with a global reset on volteer.
Signed-off-by: Jamie Ryu jamie.m.ryu@intel.com Change-Id: Idf4e0c3a60b4ac59e31df1357f2ff28f195ff17f --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 34 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/44559/3