[coreboot-gerrit] [S] Change in coreboot[master]: nb/intel: Set DMAR IOAPIC entry based on hardware

[Arthur Heymans (Code Review)]

Attention is currently required from: Angel Pons.

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70269 )

Change subject: nb/intel: Set DMAR IOAPIC entry based on hardware
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nb/intel: Set DMAR IOAPIC entry based on hardware

This avoids the need to hardcode the IOAPIC id.

Change-Id: Iccc9387734fd39e7ffe504c65d2441b580130eab
Signed-off-by: Arthur Heymans 
---
M src/northbridge/intel/haswell/acpi.c
M src/northbridge/intel/sandybridge/acpi.c
2 files changed, 16 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/70269/1

diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c
index 290dc1e..30977085 100644
--- a/src/northbridge/intel/haswell/acpi.c
+++ b/src/northbridge/intel/haswell/acpi.c
@@ -4,6 +4,7 @@
 #include <console/console.h>
 #include <commonlib/helpers.h>
 #include <acpi/acpi.h>
+#include <arch/ioapic.h>
 #include <device/device.h>
 #include <device/pci_ops.h>
 #include "haswell.h"
@@ -38,7 +39,7 @@

const unsigned long tmp = current;
    	current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
-		current += acpi_create_dmar_ds_ioapic(current, 2, PCH_IOAPIC_PCI_BUS,
+		current += acpi_create_dmar_ds_ioapic_from_hw(current, IO_APIC_ADDR, PCH_IOAPIC_PCI_BUS,
    					      PCH_IOAPIC_PCI_SLOT, 0);

size_t i;
diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c
index c2f6eae..ff180e0 100644
--- a/src/northbridge/intel/sandybridge/acpi.c
+++ b/src/northbridge/intel/sandybridge/acpi.c
@@ -4,6 +4,7 @@
 #include <console/console.h>
 #include <commonlib/helpers.h>
 #include <acpi/acpi.h>
+#include <arch/ioapic.h>
 #include <device/device.h>
 #include <device/pci_ops.h>
 #include "sandybridge.h"
@@ -42,7 +43,7 @@
    	const unsigned long tmp = current;
    	current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, VTVC0_BASE);

-		current += acpi_create_dmar_ds_ioapic(current, 2, PCH_IOAPIC_PCI_BUS,
+		current += acpi_create_dmar_ds_ioapic_from_hw(current, IO_APIC_ADDR, PCH_IOAPIC_PCI_BUS,
    			PCH_IOAPIC_PCI_SLOT, 0);

size_t i;