[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Pass MISCCFG.bit 0-5 devicetree.cb to ASL

[EricR Lai (Code Review)]

EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37794 )

Change subject: soc/intel/cannonlake: Pass MISCCFG.bit 0-5 devicetree.cb to ASL
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/37794/1/src/soc/intel/cannonlake/gp... 
File src/soc/intel/cannonlake/gpio_common.c:

https://review.coreboot.org/c/coreboot/+/37794/1/src/soc/intel/cannonlake/gp... 
PS1, Line 27: 	else
Do we need this? FPS-S will enable it anyway right? If we can pass gpio_override_pm this to GNVS, I can use the flag to do overwrite or do nothing.