Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38989 )
Change subject: [TEST] Add support for link time optimization
......................................................................
Patch Set 6:
Keith, as you also seem to care about image size, could you please test, if this still works on your Intel 440BX boards?
Size reduction for the asus/p2b (P2B-LS) seems also ten to 13 percent:
1. Without LTO:
```
fallback/romstage 0x80 stage 16412 none
cpu_microcode_blob.bin 0x4100 microcode 83968 none
fallback/ramstage 0x18980 stage 50347 none
```
2. With LTO:
```
fallback/romstage 0x80 stage 14212 none
cpu_microcode_blob.bin 0x3880 microcode 83968 none
fallback/ramstage 0x18100 stage 44882 none
```
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