[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Move GPIO PM configuration to soc level

[EricR Lai (Code Review)]

EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37685 )

Change subject: soc/intel/cannonlake: Move GPIO PM configuration to soc level
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Patch Set 7:
> Patch Set 7:
> > Patch Set 7:
> > > Patch Set 6:
> > >
> > > (4 comments)
> >
> > One more thought here, for the consistent. We can remove the overwrite flag. And put all board default as enable PM if they don't want overwrite it. So we can keep the same behavior for all boards.
>
> i want to handle it little different than what Furquan said but i will try to make use of existing code more and see how i can pass the existing GPIO_PM config from .c (via .cb from mainboard) to soc (gnvs) and make it available for runtime S0ix entry and exit

Oh, I mean we can get rid off gpio_override_pm flag and keep the config in devicetree.cb. Keep the default as MISCCFG_ENABLE_GPIO_PM_CONFIG if there is no intended to overwrite it.