[coreboot-gerrit] [XS] Change in coreboot[main]: soc/intel/mtl: Enable RAMTOP caching at SoC level for MTL devices

[Stefan Reinauer (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun.

Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81271?usp=email )

Change subject: soc/intel/mtl: Enable RAMTOP caching at SoC level for MTL devices
......................................................................

Patch Set 1: Code-Review+2