[coreboot-gerrit] Change in coreboot[master]: sb/intel/lynxpoint: Add debug print

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43778 )

Change subject: sb/intel/lynxpoint: Add debug print
......................................................................

sb/intel/lynxpoint: Add debug print

Sometimes, `root_port_commit_config` may not get called, leaving the PCH
PCIe root ports partially initialized. Windows 10 BSODs with a rather
unhelpful message when this happens. To ease debugging, always print an
easily-greppable message when the problematic function gets called.

Change-Id: Icf53c17a207755b1d8d3e9e895e06c95a4f47b6a
Signed-off-by: Angel Pons 
---
M src/southbridge/intel/lynxpoint/pcie.c
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/43778/1

diff --git a/src/southbridge/intel/lynxpoint/pcie.c b/src/southbridge/intel/lynxpoint/pcie.c
index d2950e7..9d4dc19 100644
--- a/src/southbridge/intel/lynxpoint/pcie.c
+++ b/src/southbridge/intel/lynxpoint/pcie.c
@@ -267,6 +267,8 @@
 {
    int i;

+	printk(BIOS_DEBUG, "%s: Finishing PCIe initialization\n", __func__);
+
    /* If the first root port is disabled the coalesce ports. */
    if (!is_rp_enabled(1))
    	rpc.coalesce = 1;