Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40520 )
Change subject: [RFC]drivers/smmstore: Implement SMMSTORE version 2 ......................................................................
Patch Set 7:
(2 comments)
https://review.coreboot.org/c/coreboot/+/40520/7/src/drivers/smmstore/ramsta... File src/drivers/smmstore/ramstage.c:
https://review.coreboot.org/c/coreboot/+/40520/7/src/drivers/smmstore/ramsta... PS7, Line 73: BS_DEV_INIT
No, SMM is set up in BS_DEV_INIT_CHIPS on Intel.
ah, I was testing on an AMD Stoneyridge Chromebook (same one having PCI init issues w/Tiano), and there SMM appears to set up after romstage. Which is why v2 of this patchset works on it, but current does not
https://review.coreboot.org/c/coreboot/+/40520/7/src/drivers/smmstore/store.... File src/drivers/smmstore/store.c:
https://review.coreboot.org/c/coreboot/+/40520/7/src/drivers/smmstore/store.... PS7, Line 315: printk(BIOS_ERR, "smm store: lookup of com buffer failed\n");
If it's called from ramstage that's actually fine, as the caller knows the position and size of the […]
issue is with AMD Stoney not having SMM until after romstage, and thus not having a buffer