Name of user not set #1002789 has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38723 )
Change subject: mainboard/lenovo/t440p: Enable dGPU on Lenovo T440P ......................................................................
mainboard/lenovo/t440p: Enable dGPU on Lenovo T440P
Enable the dGPU on the Lenovo T440P. It uses the same code (roughly) of the T430S. By default, it is set to be disabled however it can be enabled via the nvram option enable_dual_graphics.
Change-Id: Idf8c2c0d1ae34bda8736448d3e350396e3cf7a93 Signed-off-by: Chris Morgan macromorgan@hotmail.com --- M src/mainboard/lenovo/t440p/cmos.default M src/mainboard/lenovo/t440p/cmos.layout M src/mainboard/lenovo/t440p/romstage.c 3 files changed, 23 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/38723/1
diff --git a/src/mainboard/lenovo/t440p/cmos.default b/src/mainboard/lenovo/t440p/cmos.default index 0949e7b..bb8626d 100644 --- a/src/mainboard/lenovo/t440p/cmos.default +++ b/src/mainboard/lenovo/t440p/cmos.default @@ -10,4 +10,5 @@ sticky_fn=Disable trackpoint=Enable backlight=Keyboard +enable_dual_graphics=Disable usb_always_on=Disable diff --git a/src/mainboard/lenovo/t440p/cmos.layout b/src/mainboard/lenovo/t440p/cmos.layout index f65933a..802857e 100644 --- a/src/mainboard/lenovo/t440p/cmos.layout +++ b/src/mainboard/lenovo/t440p/cmos.layout @@ -69,7 +69,7 @@ 424 1 e 1 f1_to_f12_as_primary
# coreboot config options: northbridge -#435 2 e 12 hybrid_graphics_mode +435 1 e 1 enable_dual_graphics #437 3 r 0 unused 440 8 h 0 volume
diff --git a/src/mainboard/lenovo/t440p/romstage.c b/src/mainboard/lenovo/t440p/romstage.c index c8c630b..95d117e 100644 --- a/src/mainboard/lenovo/t440p/romstage.c +++ b/src/mainboard/lenovo/t440p/romstage.c @@ -22,6 +22,9 @@ #include <northbridge/intel/haswell/pei_data.h> #include <southbridge/intel/common/gpio.h> #include <southbridge/intel/lynxpoint/pch.h> +#include <option.h> +#include <ec/lenovo/pmh7/pmh7.h> +#include <device/pci_ops.h>
static const struct rcba_config_instruction rcba_config[] = { RCBA_SET_REG_16(D31IR, DIR_ROUTE(PIRQA, PIRQD, PIRQC, PIRQA)), @@ -100,4 +103,22 @@ };
romstage_common(&romstage_params); + + u8 enable_peg; + if (get_option(&enable_peg, "enable_dual_graphics") != CB_SUCCESS) + enable_peg = 0; + + bool power_en = pmh7_dgpu_power_state(); + + if (enable_peg != power_en) + pmh7_dgpu_power_enable(!power_en); + + if (!enable_peg) { + // Hide disabled dGPU device + u32 reg32 = pci_read_config32(PCI_DEV(0, 0, 0), DEVEN); + reg32 &= ~DEVEN_D1F0EN; + + pci_write_config32(PCI_DEV(0, 0, 0), DEVEN, reg32); + } + }