ron minnich has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31253 )
Change subject: riscv: Add initial support for 32bit boards ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/#/c/31253/3/src/lib/libgcc.c File src/lib/libgcc.c:
https://review.coreboot.org/#/c/31253/3/src/lib/libgcc.c@24 PS3, Line 24: #if !IS_ENABLED(CONFIG_ARCH_X86) && !IS_ENABLED(CONFIG_ARCH_RISCV_RV32)
Analyze why this is needed on RV32
It's pre-defined in the libgcc for rv32. e.g. /home/rminnich/projects/riscv/coreboot/util/crossgcc/build-riscv64-elf-GCC/riscv64-elf/rv32im/ilp32/libgcc/../../../../../gcc-8.2.0/libgcc/libgcc2.c:710: multiple definition of `__clzsi2'; build/bootblock/lib/libgcc.o:/home/rminnich/projects/riscv/coreboot/src/lib/libgcc.c:35: first defined here
so you can change the comment: something like this, which I tested just now:
+#if !IS_ENABLED(CONFIG_ARCH_X86) /* work around lack of --gc-sections on x86 */ \ + && !IS_ENABLED(CONFIG_ARCH_RISCV_RV32) /* defined in rv32 libgcc.a */