HAOUAS Elyes (ehaouas@noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16285
-gerrit
commit 03368b8e4c800454600bea63d0dc6fe99635cd6d Author: Elyes HAOUAS ehaouas@noos.fr Date: Sun Aug 21 17:28:20 2016 +0200
src/include: Add required space before opening parenthesis '('
Change-Id: I307d37cdf2647467d4c88dfa4be5c66c8587202e Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- src/include/cpu/amd/model_fxx_rev.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/include/cpu/amd/model_fxx_rev.h b/src/include/cpu/amd/model_fxx_rev.h index 7cd6158..02a50d1 100644 --- a/src/include/cpu/amd/model_fxx_rev.h +++ b/src/include/cpu/amd/model_fxx_rev.h @@ -73,7 +73,7 @@ static inline int is_e0_later_in_bsp(int nodeid) if (IS_ENABLED(CONFIG_K8_REV_F_SUPPORT)) return 1;
- if(nodeid==0) { // we don't need to do that for node 0 in core0/node0 + if (nodeid==0) { // we don't need to do that for node 0 in core0/node0 return !is_cpu_pre_e0(); } // d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 always 0 @@ -85,7 +85,7 @@ static inline int is_e0_later_in_bsp(int nodeid) pci_write_config32(dev, 0x80, val); val = pci_read_config32(dev, 0x80); e0_later = !!(val & (1<<3)); - if(e0_later) { // pre_e0 bit 3 always be 0 and can not be changed + if (e0_later) { // pre_e0 bit 3 always be 0 and can not be changed pci_write_config32(dev, 0x80, val_old); // restore it }