Change subject: soc/intel/{apl, cnl, skl}: Add sanity check of SA_PCIEX_LENGTH_MIB
......................................................................
--
To view, visit
https://review.coreboot.org/c/coreboot/+/40337
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0dd67868df373c6ab5c724a21371bcc206968036
Gerrit-Change-Number: 40337
Gerrit-PatchSet: 5
Gerrit-Owner: Subrata Banik
subrata.banik@intel.com
Gerrit-Reviewer: Andrey Petrov
andrey.petrov@gmail.com
Gerrit-Reviewer: Furquan Shaikh
furquan@google.com
Gerrit-Reviewer: Maxim Polyakov
max.senia.poliak@gmail.com
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: Pratikkumar V Prajapati
pratikkumar.v.prajapati@intel.com
Gerrit-Reviewer: Usha P
usha.p@intel.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-MessageType: abandon