Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38248 )
Change subject: soc/intel/common: Add description for macros ......................................................................
soc/intel/common: Add description for macros
Below changes are done in the patch: 1. Remove unnecessary lining, and replace spaces with tabs 2. Add description for macros 3. Correct comment mentioned for wrapper #ifndef
TEST=Build and Boot hatch board
Change-Id: I630446234321e7998ab42f8506a58b16e9ce4eb0 Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com --- M src/soc/intel/common/block/include/intelblocks/cse.h 1 file changed, 9 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/38248/1
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index b4bfe68..5b6fb25 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -105,7 +105,6 @@ */ bool is_cse_enabled(void);
- /* Makes the host ready to communicate with CSE*/ void set_host_ready(void);
@@ -135,18 +134,20 @@ */ int send_hmrfpo_get_status_msg(void);
+/* Fixed MEI Header's Host Address field value */ +#define BIOS_HOST_ADDR 0x00
-#define BIOS_HOST_ADDR 0x00 -#define HECI_MKHI_ADDR 0x07 +/* Fixed MEI Header's ME Address field value */ +#define HECI_MKHI_ADDR 0x07
/* Command GLOBAL_RESET_REQ Reset Types */ -#define GLOBAL_RESET 1 -#define HOST_RESET_ONLY 2 -#define CSE_RESET_ONLY 3 +#define GLOBAL_RESET 1 +#define HOST_RESET_ONLY 2 +#define CSE_RESET_ONLY 3
-/*HMRFPO Status types */ +/* HMRFPO Status types */ #define MKHI_HMRFPO_DISABLED 0 #define MKHI_HMRFPO_LOCKED 1 #define MKHI_HMRFPO_ENABLED 2
-#endif // SOC_INTEL_COMMON_MSR_H +#endif // SOC_INTEL_COMMON_CSE_H