[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/{cannonlake, icelake}: Enable GPIO PM programming in coreboot

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32790

Change subject: soc/intel/{cannonlake, icelake}: Enable GPIO PM programming in coreboot
......................................................................

soc/intel/{cannonlake, icelake}: Enable GPIO PM programming in coreboot

This patch ensures to override FSP default gpio pm programming based
on platform need.

BUG=b:130764684
TEST=Able to build and boot from fixed media on ICL and CML.

Change-Id: Iec60076398b745e11d5025e4d7a5c35374d918a4
Signed-off-by: Subrata Banik 
---
M src/soc/intel/cannonlake/chip.c
M src/soc/intel/icelake/chip.c
2 files changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/32790/1

diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index 1bd34c3..f64aa17 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -176,6 +176,9 @@

/* TODO(furquan): Get rid of this workaround once FSP is fixed. */
    cnl_configure_pads(NULL, 0);
+
+	/* Overriding FSP default GPIO PM programming. */
+	gpio_pm_configure();
 }

static void pci_domain_set_resources(struct device *dev)
diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c
index 11d14de..73f003c 100644
--- a/src/soc/intel/icelake/chip.c
+++ b/src/soc/intel/icelake/chip.c
@@ -117,6 +117,9 @@

/* Restore GPIO IRQ polarities back to previous settings. */
    itss_restore_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END);
+
+	/* Overriding FSP default GPIO PM programming. */
+	gpio_pm_configure();
 }

static void pci_domain_set_resources(struct device *dev)